| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 199 MERGE_VALUES, enumerator
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1644 case ExtractValue: return ISD::MERGE_VALUES; in InstructionOpcodeToISD()
1645 case InsertValue: return ISD::MERGE_VALUES; in InstructionOpcodeToISD()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 335 case ISD::MERGE_VALUES: in LegalizeOp()
844 case ISD::MERGE_VALUES: in Expand()
|
| D | SelectionDAGDumper.cpp | 173 case ISD::MERGE_VALUES: return "merge_values"; in getOperationName()
|
| D | SelectionDAGBuilder.cpp | 887 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values); in getCopyFromRegs()
2933 SDValue Res = DAG.getNode(ISD::MERGE_VALUES, dl, in visitLandingPad()
3412 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(), in visitSelect()
3828 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(), in visitInsertValue()
3868 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(), in visitExtractValue()
4162 setValue(&I, DAG.getNode(ISD::MERGE_VALUES, dl, in visitLoad()
8540 if (Val.getOpcode() == ISD::MERGE_VALUES) { in visitInlineAsm()
8556 SDValue V = DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(), in visitInlineAsm()
9406 SDValue Res = CLI.DAG.getNode(ISD::MERGE_VALUES, CLI.DL, in LowerCallTo()
|
| D | InstrEmitter.cpp | 991 case ISD::MERGE_VALUES: in EmitSpecialNode()
|
| D | LegalizeFloatTypes.cpp | 61 case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break; in SoftenFloatResult()
1121 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; in ExpandFloatResult()
|
| D | LegalizeVectorTypes.cpp | 50 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break; in ScalarizeVectorResult()
825 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; in SplitVectorResult()
2687 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break; in WidenVectorResult()
|
| D | ScheduleDAGRRList.cpp | 706 case ISD::MERGE_VALUES: in EmitNode()
|
| D | LegalizeDAG.cpp | 1073 case ISD::MERGE_VALUES: in LegalizeOp()
2862 case ISD::MERGE_VALUES: in ExpandNode()
|
| D | LegalizeIntegerTypes.cpp | 55 case ISD::MERGE_VALUES:Res = PromoteIntRes_MERGE_VALUES(N, ResNo); break; in PromoteIntegerResult()
1791 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; in ExpandIntegerResult()
|
| D | SelectionDAG.cpp | 4560 case ISD::MERGE_VALUES: in getNode()
6663 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops); in getMergeValues()
|
| D | TargetLowering.cpp | 7571 assert(Ret.getOpcode() == ISD::MERGE_VALUES && in expandMULO()
|
| D | DAGCombiner.cpp | 1500 case ISD::MERGE_VALUES: return visitMERGE_VALUES(N); in visit()
11041 if (Elt.getOpcode() != ISD::MERGE_VALUES) in getBuildPairElt()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 824 return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(VT,VT), Lo, Hi); in LowerSHLParts()
862 return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(VT,VT), Lo, Hi); in LowerSRXParts()
880 return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(VT, VT), Res, OVF); in LowerUADDSUBO()
|
| D | SIISelLowering.cpp | 4329 if (Res.getOpcode() == ISD::MERGE_VALUES) { in ReplaceNodeResults()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 3635 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, SetCC); in lowerXALUO()
3701 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, SetCC); in lowerADDSUBCARRY()
4107 return DAG.getNode(ISD::MERGE_VALUES, SDLoc(Op), Op->getVTList(), in lowerINTRINSIC_WO_CHAIN()
5983 return DAG.getNode(ISD::MERGE_VALUES, SDLoc(Op0), in combineFP_ROUND()
6049 return DAG.getNode(ISD::MERGE_VALUES, SDLoc(Op0), in combineFP_EXTEND()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | README.txt | 1372 it into a MERGE_VALUES with the first definition being an implicit_def. The
|
| D | X86ISelLowering.cpp | 22020 return DAG.getNode(ISD::MERGE_VALUES, DL, Op->getVTList(), Value, SetCC); in LowerXALUO()
24865 return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), SetCC, in LowerINTRINSIC_W_CHAIN()
24886 return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), SetCC, in LowerINTRINSIC_W_CHAIN()
24911 return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), Result, isValid, in LowerINTRINSIC_W_CHAIN()
24986 return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), in LowerINTRINSIC_W_CHAIN()
27582 return DAG.getNode(ISD::MERGE_VALUES, DL, Op->getVTList(), in LowerCMP_SWAP()
28039 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), in lowerAtomicArith()
28046 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), in lowerAtomicArith()
28054 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), in lowerAtomicArith()
28135 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Sum, SetCC); in LowerADDSUBCARRY()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4485 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerSignedALUO()
4546 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerUnsignedALUO()
8866 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, Carry); in LowerADDSUBCARRY()
8940 return DAG.getNode(ISD::MERGE_VALUES, dl, Tys, in LowerFSINCOS()
16259 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(VT, VT), Values); in LowerDivRem()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2482 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerXALUO()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 13494 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(VecTy, MVT::Other), in expandVSXLoadForLE()
|