| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceVariableSplitting.cpp | 316 Inst *Mov = Target->createLoweredMove(NewMapped, Dest); in handleSimpleVarAssign() local
317 Node->getInsts().insert(IterNext, Mov); in handleSimpleVarAssign()
341 Inst *Mov = Target->createLoweredMove(NewMapped, SrcVar); in handleSimpleVarAssign() local
342 Node->getInsts().insert(IterNext, Mov); in handleSimpleVarAssign()
347 Inst *Mov = Target->createLoweredMove(OldMapped, SrcVar); in handleSimpleVarAssign() local
348 Mov->setDestRedefined(); in handleSimpleVarAssign()
349 Node->getInsts().insert(IterNext, Mov); in handleSimpleVarAssign()
366 Inst *Mov = Target->createLoweredMove(NewMapped, Dest); in handlePhi() local
367 Node->getInsts().insert(IterCur, Mov); in handlePhi()
400 Inst *Mov = Target->createLoweredMove(NewMapped, OldMapped); in handleGeneralInst() local
[all …]
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| D | IceTargetLoweringX8664.h | 142 return Insts::Mov::create(Func, Dest, SrcVar); in createLoweredMove()
571 Insts::Mov *_mov(Variable *&Dest, Operand *Src0, RegNumT RegNum = RegNumT()) {
574 return Context.insert<Insts::Mov>(Dest, Src0);
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| D | IceTargetLoweringX8632.h | 141 return Insts::Mov::create(Func, Dest, SrcVar); in createLoweredMove()
577 Insts::Mov *_mov(Variable *&Dest, Operand *Src0, RegNumT RegNum = RegNumT()) {
580 return Context.insert<Insts::Mov>(Dest, Src0);
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| D | IceInstMIPS32.h | 235 Mov, // actually a pseudo op for addi rd, rs, 0 enumerator
1311 static bool classof(const Inst *Inst) { return isClassof(Inst, Mov); } in classof()
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| D | IceInstARM32.h | 402 Mov, enumerator
1516 static bool classof(const Inst *Instr) { return isClassof(Instr, Mov); } in classof()
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| D | IceInstX8632.h | 235 Mov, enumerator
1336 class InstX86Mov : public InstX86BaseMovlike<InstX86Base::Mov> {
1350 : InstX86BaseMovlike<InstX86Base::Mov>(Func, Dest, Source) {} in InstX86Mov()
3179 using Mov = InstX86Mov; member
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| D | IceInstX8664.h | 174 Mov, enumerator
1277 class InstX86Mov : public InstX86BaseMovlike<InstX86Base::Mov> {
1291 : InstX86BaseMovlike<InstX86Base::Mov>(Func, Dest, Source) {} in InstX86Mov()
3078 using Mov = InstX86Mov; member
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| D | IceTargetLoweringMIPS32.h | 789 void legalizeMov(InstMIPS32Mov *Mov);
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| D | IceInstMIPS32.cpp | 196 : InstMIPS32(Func, InstMIPS32::Mov, 2, Dest) { in InstMIPS32Mov()
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| D | IceTargetLoweringARM32.h | 1032 void legalizeMov(InstARM32Mov *Mov);
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| D | IceInstARM32.cpp | 1536 : InstARM32Pred(Func, InstARM32::Mov, 2, Dest, Predicate) { in InstARM32Mov()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 101 MachineInstr *Mov = TII->buildMovInstr(&MBB, I, in runOnMachineFunction() local
106 int MovPredSelIdx = TII->getOperandIdx(Mov->getOpcode(), in runOnMachineFunction()
109 Mov->getOperand(MovPredSelIdx).setReg( in runOnMachineFunction()
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| D | R600InstrInfo.cpp | 1137 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, in buildIndirectWrite() local
1141 setImmOperand(*Mov, R600::OpName::dst_rel, 1); in buildIndirectWrite()
1142 return Mov; in buildIndirectWrite()
1169 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, R600::MOV, in buildIndirectRead() local
1174 setImmOperand(*Mov, R600::OpName::src0_rel, 1); in buildIndirectRead()
1176 return Mov; in buildIndirectRead()
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| D | SILoadStoreOptimizer.cpp | 1578 MachineInstr *Mov = in createRegOrImm() local
1582 (void)Mov; in createRegOrImm()
1583 LLVM_DEBUG(dbgs() << " "; Mov->dump()); in createRegOrImm()
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| D | SIRegisterInfo.cpp | 821 MachineInstrBuilder Mov in spillSGPR() local
832 Mov.addReg(SuperReg, RegState::Implicit | SuperKillState); in spillSGPR()
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| D | AMDGPUISelDAGToDAG.cpp | 990 SDNode *Mov = CurDAG->getMachineNode( in getMaterializedScalarImm32() local
993 return SDValue(Mov, 0); in getMaterializedScalarImm32()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 958 MachineInstrBuilder Mov; in copyPhysReg() local
976 Mov = BuildMI(MBB, I, I->getDebugLoc(), get(Opc), Dst).addReg(Src); in copyPhysReg()
979 Mov.addReg(Src); in copyPhysReg()
983 addUnpredicatedMveVpredROp(Mov, Dst); in copyPhysReg()
985 Mov = Mov.add(predOps(ARMCC::AL)); in copyPhysReg()
988 Mov = Mov.add(condCodeOp()); in copyPhysReg()
991 Mov->addRegisterDefined(DestReg, TRI); in copyPhysReg()
993 Mov->addRegisterKilled(SrcReg, TRI); in copyPhysReg()
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| D | ARMScheduleA9.td | 2153 // A9WriteLfp1-8Mov adds a cycle of latency and FP resource for
2155 def A9WriteLfp#NumAddr#Mov : WriteSequence<
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 7471 SDValue Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm64() local
7473 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in tryAdvSIMDModImm64()
7510 SDValue Mov; in tryAdvSIMDModImm32() local
7513 Mov = DAG.getNode(NewOp, dl, MovTy, *LHS, in tryAdvSIMDModImm32()
7517 Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm32()
7521 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in tryAdvSIMDModImm32()
7550 SDValue Mov; in tryAdvSIMDModImm16() local
7553 Mov = DAG.getNode(NewOp, dl, MovTy, *LHS, in tryAdvSIMDModImm16()
7557 Mov = DAG.getNode(NewOp, dl, MovTy, in tryAdvSIMDModImm16()
7561 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in tryAdvSIMDModImm16()
[all …]
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| /third_party/gstreamer/gstplugins_good/ |
| D | ChangeLog | 54567 Mov spec says it uses a pascal style string, while isomedia uses
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| /third_party/chromium/patch/ |
| D | 0001-cve.patch | 67069 zo@?wD&Ncp3_N(&m-)0A8?%^54Opd;X<vl!Mov|J!V=X!Q%J@p1Da_a<_Fv^aJPSCG
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