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Searched refs:NV50_IR_MOD_ABS (Results 1 – 11 of 11) sorted by relevance

/third_party/mesa3d/src/nouveau/codegen/
Dnv50_ir.h606 #define NV50_IR_MOD_ABS (1 << 0) macro
610 #define NV50_IR_MOD_NEG_ABS (NV50_IR_MOD_NEG | NV50_IR_MOD_ABS)
644 inline int abs() const { return (bits & NV50_IR_MOD_ABS) ? 1 : 0; } in abs()
Dnv50_ir.cpp33 case OP_ABS: bits = NV50_IR_MOD_ABS; break; in Modifier()
47 if (this->bits & NV50_IR_MOD_ABS) in operator *()
51 c = (this->bits | m.bits) & (NV50_IR_MOD_ABS | NV50_IR_MOD_SAT); in operator *()
Dnv50_ir_target_nv50.cpp181 opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_ABS; in initOpInfo()
Dnv50_ir_target_nvc0.cpp177 opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_ABS; in initProps()
Dnv50_ir_peephole.cpp487 if (bits & NV50_IR_MOD_ABS) in applyTo()
507 if (bits & NV50_IR_MOD_ABS) in applyTo()
517 if (bits & NV50_IR_MOD_ABS) in applyTo()
542 case NV50_IR_MOD_ABS: return OP_ABS; in getOp()
1767 mod = mod & Modifier(~(NV50_IR_MOD_NEG | NV50_IR_MOD_ABS)); in visit()
1775 mod = mod & Modifier(~NV50_IR_MOD_ABS); in visit()
Dnv50_ir_target_gv100.cpp101 #define MOD_ABS NV50_IR_MOD_ABS
Dnv50_ir_print.cpp450 if (bits & NV50_IR_MOD_ABS) in print()
Dnv50_ir_lowering_nvc0.cpp800 mod1 = NV50_IR_MOD_ABS; in replaceCvt()
806 (cvt->src(0).mod && cvt->src(0).mod != Modifier(NV50_IR_MOD_ABS))) in replaceCvt()
810 mod1 = cvt->src(0).mod == Modifier(NV50_IR_MOD_ABS) ? in replaceCvt()
Dnv50_ir_lowering_nv50.cpp526 af->getInsn()->src(0).mod = Modifier(NV50_IR_MOD_ABS); in handleDIV()
527 bf->getInsn()->src(0).mod = Modifier(NV50_IR_MOD_ABS); in handleDIV()
Dnv50_ir_from_tgsi.cpp410 m = m | nv50_ir::Modifier(NV50_IR_MOD_ABS); in getMod()
1863 if (m & Modifier(NV50_IR_MOD_ABS)) in applySrcMod()
Dnv50_ir_emit_nvc0.cpp3007 if (i->src(s).mod == Modifier(NV50_IR_MOD_ABS)) in getMinEncodingSize()