Home
last modified time | relevance | path

Searched refs:NumOps (Results 1 – 25 of 80) sorted by relevance

1234

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/IR/
DUser.h76 User(Type *ty, unsigned vty, Use *, unsigned NumOps) in User() argument
78 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); in User()
79 NumUserOperands = NumOps; in User()
183 void setGlobalVariableNumOperands(unsigned NumOps) { in setGlobalVariableNumOperands() argument
184 assert(NumOps <= 1 && "GlobalVariable can only have 0 or 1 operands"); in setGlobalVariableNumOperands()
185 NumUserOperands = NumOps; in setGlobalVariableNumOperands()
191 void setNumHungOffUseOperands(unsigned NumOps) { in setNumHungOffUseOperands() argument
193 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); in setNumHungOffUseOperands()
194 NumUserOperands = NumOps; in setNumHungOffUseOperands()
DConstant.h46 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) in Constant() argument
47 : User(ty, vty, Ops, NumOps) {} in Constant()
DGlobalObject.h32 GlobalObject(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps,
35 : GlobalValue(Ty, VTy, Ops, NumOps, Linkage, Name, AddressSpace), in GlobalValue() argument
DInstruction.h592 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
594 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DUser.h73 User(Type *ty, unsigned vty, Use *, unsigned NumOps) in User() argument
75 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); in User()
76 NumUserOperands = NumOps; in User()
207 void setGlobalVariableNumOperands(unsigned NumOps) { in setGlobalVariableNumOperands() argument
208 assert(NumOps <= 1 && "GlobalVariable can only have 0 or 1 operands"); in setGlobalVariableNumOperands()
209 NumUserOperands = NumOps; in setGlobalVariableNumOperands()
215 void setNumHungOffUseOperands(unsigned NumOps) { in setNumHungOffUseOperands() argument
217 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); in setNumHungOffUseOperands()
218 NumUserOperands = NumOps; in setNumHungOffUseOperands()
DDerivedUser.h37 DerivedUser(Type *Ty, unsigned VK, Use *U, unsigned NumOps, in DerivedUser() argument
39 : User(Ty, VK, U, NumOps), DeleteValue(DeleteValue) {} in DerivedUser()
DInlineAsm.h269 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { in getFlagWord() argument
270 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!"); in getFlagWord()
272 return Kind | (NumOps << 3); in getFlagWord()
DConstant.h43 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) in Constant() argument
44 : User(ty, vty, Ops, NumOps) {} in Constant()
DGlobalObject.h46 GlobalObject(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps,
49 : GlobalValue(Ty, VTy, Ops, NumOps, Linkage, Name, AddressSpace), in GlobalValue() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.h123 template <unsigned NumOps>
125 int8_t RegBanks[NumOps];
129 template <unsigned NumOps>
132 const std::array<unsigned, NumOps> RegSrcOpIdx,
133 ArrayRef<OpRegBankEntry<NumOps>> Table) const;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCTargetDesc.cpp142 unsigned NumOps = Inst.getNumOperands(); in evaluateBranch() local
143 if (NumOps == 0) in evaluateBranch()
145 switch (Info->get(Inst.getOpcode()).OpInfo[NumOps - 1].OperandType) { in evaluateBranch()
151 Target = Region + Inst.getOperand(NumOps - 1).getImm(); in evaluateBranch()
156 Target = Addr + Inst.getOperand(NumOps - 1).getImm(); in evaluateBranch()
/third_party/rust/crates/num-traits/src/
Dlib.rs68 pub trait Num: PartialEq + Zero + One + NumOps {
102 pub trait NumOps<Rhs = Self, Output = Self>: interface
111 impl<T, Rhs, Output> NumOps<Rhs, Output> for T where
124 pub trait NumRef: Num + for<'r> NumOps<&'r Self> {}
125 impl<T> NumRef for T where T: Num + for<'r> NumOps<&'r T> {}
133 pub trait RefNum<Base>: NumOps<Base, Base> + for<'r> NumOps<&'r Base, Base> {}
134 impl<T, Base> RefNum<Base> for T where T: NumOps<Base, Base> + for<'r> NumOps<&'r Base, Base> {}
181 Wrapping<T>: NumOps,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineRegisterInfo.cpp231 unsigned NumOps = MI->getNumOperands(); in verifyUseList() local
232 if (!(MO >= MO0 && MO < MO0+NumOps)) { in verifyUseList()
335 unsigned NumOps) { in moveOperands() argument
336 assert(Src != Dst && NumOps && "Noop moveOperands"); in moveOperands()
340 if (Dst >= Src && Dst < Src + NumOps) { in moveOperands()
342 Dst += NumOps - 1; in moveOperands()
343 Src += NumOps - 1; in moveOperands()
372 } while (--NumOps); in moveOperands()
DCallingConvLower.cpp129 unsigned NumOps = Outs.size(); in AnalyzeCallOperands() local
130 for (unsigned i = 0; i != NumOps; ++i) { in AnalyzeCallOperands()
147 unsigned NumOps = ArgVTs.size(); in AnalyzeCallOperands() local
148 for (unsigned i = 0; i != NumOps; ++i) { in AnalyzeCallOperands()
DMachineInstr.cpp122 if (unsigned NumOps = MCID->getNumOperands() + in MachineInstr() local
124 CapOperands = OperandCapacity::get(NumOps); in MachineInstr()
187 unsigned NumOps, MachineRegisterInfo *MRI) { in moveOperands() argument
189 return MRI->moveOperands(Dst, Src, NumOps); in moveOperands()
192 std::memmove(Dst, Src, NumOps * sizeof(MachineOperand)); in moveOperands()
793 unsigned NumOps; in findInlineAsmFlagIdx() local
795 i += NumOps) { in findInlineAsmFlagIdx()
800 NumOps = 1 + InlineAsm::getNumOperandRegisters(FlagMO.getImm()); in findInlineAsmFlagIdx()
801 if (i + NumOps > OpIdx) { in findInlineAsmFlagIdx()
1101 unsigned NumOps; in findTiedOperandIdx() local
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumb2SizeReduction.cpp807 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() local
808 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceTo2Addr()
809 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceTo2Addr()
829 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() local
831 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr()
899 unsigned NumOps = MCID.getNumOperands(); in ReduceToNarrow() local
900 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceToNarrow()
901 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceToNarrow()
936 unsigned NumOps = MCID.getNumOperands(); in ReduceToNarrow() local
938 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceToNarrow()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcISelDAGToDAG.cpp160 unsigned NumOps = N->getNumOperands(); in tryInlineAsm() local
171 SDValue Glue = N->getGluedNode() ? N->getOperand(NumOps-1) in tryInlineAsm()
176 for(unsigned i = 0, e = N->getGluedNode() ? NumOps - 1 : NumOps; i < e; ++i) { in tryInlineAsm()
221 assert((i+2 < NumOps) && "Invalid number of operands in inline asm"); in tryInlineAsm()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp485 unsigned NumOps = Node->getNumOperands(); in DelayForLiveRegsBottomUp() local
486 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) in DelayForLiveRegsBottomUp()
487 --NumOps; // Ignore the glue operand. in DelayForLiveRegsBottomUp()
489 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { in DelayForLiveRegsBottomUp()
673 unsigned NumOps = N->getNumOperands(); in ScheduleNode() local
674 if (unsigned NumLeft = NumOps) { in ScheduleNode()
680 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) { in ScheduleNode()
DInstrEmitter.cpp636 unsigned NumOps = Node->getNumOperands(); in EmitRegSequence() local
640 if (NumOps && Node->getOperand(NumOps-1).getValueType() == MVT::Other) in EmitRegSequence()
641 --NumOps; // Ignore chain if it exists. in EmitRegSequence()
643 assert((NumOps & 1) == 1 && in EmitRegSequence()
645 for (unsigned i = 1; i != NumOps; ++i) { in EmitRegSequence()
1047 unsigned NumOps = Node->getNumOperands(); in EmitSpecialNode() local
1048 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) in EmitSpecialNode()
1049 --NumOps; // Ignore the glue operand. in EmitSpecialNode()
1077 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { in EmitSpecialNode()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp865 unsigned NumOps = Desc.getNumOperands(); in emitVEXOpcodePrefix() local
1022 unsigned RcOperand = NumOps - 1; in emitVEXOpcodePrefix()
1181 unsigned NumOps = MI.getNumOperands(); in determineREXPrefix() local
1185 for (unsigned i = CurOp; i != NumOps; ++i) { in determineREXPrefix()
1388 unsigned NumOps = Desc.getNumOperands(); in encodeInstruction() local
1429 OpcodeOffset = MI.getOperand(NumOps - 1).getImm(); in encodeInstruction()
1431 --NumOps; // Drop the operand from the end. in encodeInstruction()
1520 --NumOps; in encodeInstruction()
1751 if (CurOp != NumOps) { in encodeInstruction()
1762 while (CurOp != NumOps && NumOps - CurOp <= 2) { in encodeInstruction()
[all …]
DX86BaseInfo.h977 unsigned NumOps = Desc.getNumOperands(); in getOperandBias() local
984 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) in getOperandBias()
988 if (NumOps == 8 && in getOperandBias()
994 if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
999 if (NumOps == 9 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86FloatingPoint.cpp1121 unsigned NumOps = MI.getDesc().getNumOperands(); in handleOneArgFP() local
1122 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && in handleOneArgFP()
1126 unsigned Reg = getFPReg(MI.getOperand(NumOps - 1)); in handleOneArgFP()
1154 MI.RemoveOperand(NumOps - 1); // Remove explicit ST(0) operand in handleOneArgFP()
1182 unsigned NumOps = MI.getDesc().getNumOperands(); in handleOneArgFPRW() local
1183 assert(NumOps >= 2 && "FPRW instructions must have 2 ops!!"); in handleOneArgFPRW()
1527 unsigned NumOps = 0; in handleSpecialFP() local
1532 i != e && MI.getOperand(i).isImm(); i += 1 + NumOps) { in handleSpecialFP()
1535 NumOps = InlineAsm::getNumOperandRegisters(Flags); in handleSpecialFP()
1536 if (NumOps != 1) in handleSpecialFP()
DX86CallFrameOptimization.cpp562 unsigned NumOps = DefMov->getDesc().getNumOperands(); in adjustCallSequence() local
563 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i) in adjustCallSequence()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonGenPredicate.cpp373 unsigned NumOps = MI->getNumOperands(); in convertToPredForm() local
374 for (unsigned i = 0; i < NumOps; ++i) { in convertToPredForm()
410 NumOps = 2; in convertToPredForm()
426 for (unsigned i = 1; i < NumOps; ++i) { in convertToPredForm()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DInstruction.cpp23 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, in Instruction() argument
25 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) { in Instruction()
35 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, in Instruction() argument
37 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) { in Instruction()

1234