Searched refs:OP_LG2 (Results 1 – 15 of 15) sorted by relevance
| /third_party/mesa3d/src/nouveau/codegen/ |
| D | nv50_ir_target_gm107.cpp | 129 case OP_LG2: in isBarrierRequired()
260 case OP_LG2: in getLatency()
289 case OP_LG2: in getReadLatency()
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| D | nv50_ir_target_nv50.cpp | 103 { OP_LG2, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
557 case OP_LG2: in getThroughput()
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| D | nv50_ir_target_nvc0.cpp | 129 { OP_LG2, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 },
637 case OP_LG2: in getThroughput()
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| D | nv50_ir_target_gv100.cpp | 268 case OP_LG2: in getOpInfo()
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| D | nv50_ir_emit_gv100.cpp | 598 case OP_LG2 : mufu = 3; break; in emitMUFU()
1840 case OP_LG2: in emitInstruction()
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| D | nv50_ir.h | 89 OP_LG2, enumerator
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| D | nv50_ir_emit_gm107.cpp | 1449 case OP_LG2: mufu = 3; break; in emitMUFU()
3619 case OP_LG2: in emitInstruction()
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| D | nv50_ir_emit_nv50.cpp | 2047 case OP_LG2: in emitInstruction()
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| D | nv50_ir_peephole.cpp | 887 case OP_LG2: res.data.f32 = log2f(imm.reg.data.f32); break; in unary()
1548 case OP_LG2: in opnd()
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| D | nv50_ir_emit_gk110.cpp | 2641 case OP_LG2: in emitInstruction()
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| D | nv50_ir_emit_nvc0.cpp | 2811 case OP_LG2: in emitInstruction()
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| D | nv50_ir_lowering_nv50.cpp | 1372 bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0)); in handlePOW()
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| D | nv50_ir_from_nir.cpp | 430 return OP_LG2; in getOperation()
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| D | nv50_ir_from_tgsi.cpp | 3322 val0 = mkOp1v(OP_LG2, TYPE_F32, dst0[2] ? dst0[2] : getSSA(), src0); in handleInstruction()
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| D | nv50_ir_lowering_nvc0.cpp | 3164 bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0)); in handlePOW()
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