Searched refs:OP_QUADOP (Results 1 – 11 of 11) sorted by relevance
| /third_party/mesa3d/src/nouveau/codegen/ |
| D | nv50_ir_lowering_gm107.cpp | 159 add = bld.mkOp2(OP_QUADOP, TYPE_F32, crd[c], tmp, crd[c]); in handleManualTXD()
167 add = bld.mkOp2(OP_QUADOP, TYPE_F32, crd[c], tmp, crd[c]); in handleManualTXD()
246 insn->op = OP_QUADOP; in handleDFDX()
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| D | nv50_ir_target_gm107.cpp | 227 case OP_QUADOP: in getLatency()
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| D | nv50_ir_build_util.cpp | 268 Instruction *quadop = mkOp2(OP_QUADOP, TYPE_F32, def, src0, src1); in mkQuadop()
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| D | nv50_ir_target_gv100.cpp | 334 case OP_QUADOP: return &opInfo_FSWZADD; in getOpInfo()
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| D | nv50_ir.h | 150 OP_QUADOP, enumerator
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| D | nv50_ir_emit_gv100.cpp | 1939 case OP_QUADOP: in emitInstruction()
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| D | nv50_ir_emit_nv50.cpp | 2111 case OP_QUADOP: in emitInstruction()
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| D | nv50_ir_emit_gk110.cpp | 2691 case OP_QUADOP: in emitInstruction()
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| D | nv50_ir_emit_nvc0.cpp | 2885 case OP_QUADOP: in emitInstruction()
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| D | nv50_ir_emit_gm107.cpp | 3726 case OP_QUADOP: in emitInstruction()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 12.0.2.rst | 349 - nv50/ir: always emit the NDV bit for OP_QUADOP
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