Searched refs:OP_SAD (Results 1 – 9 of 9) sorted by relevance
| /third_party/mesa3d/src/nouveau/codegen/ |
| D | nv50_ir_target_gm107.cpp | 58 case OP_SAD: in isOpSupported()
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| D | nv50_ir_target_nv50.cpp | 121 OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP, in initOpInfo()
459 case OP_SAD: in isOpSupported()
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| D | nv50_ir_peephole.cpp | 1836 !prog->getTarget()->isOpSupported(OP_SAD, abs->dType)) in handleABS()
1865 abs->op = OP_SAD; in handleABS()
1886 if (!changed && prog->getTarget()->isOpSupported(OP_SAD, add->dType)) in handleADD()
1887 changed = tryADDToMADOrSAD(add, OP_SAD); in handleADD()
1900 const operation srcOp = toOp == OP_SAD ? OP_SAD : OP_MUL; in tryADDToMADOrSAD()
1923 if (toOp == OP_SAD) { in tryADDToMADOrSAD()
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| D | nv50_ir_target_nvc0.cpp | 474 if (op == OP_SAD && ty != TYPE_S32 && ty != TYPE_U32) in isOpSupported()
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| D | nv50_ir.h | 59 OP_SAD, // abs(src0 - src1) + src2 enumerator
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| D | nv50_ir_emit_nv50.cpp | 2000 case OP_SAD: in emitInstruction()
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| D | nv50_ir_emit_gk110.cpp | 2579 case OP_SAD: in emitInstruction()
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| D | nv50_ir_ra.cpp | 1547 if (insn->op != OP_MAD && insn->op != OP_FMA && insn->op != OP_SAD) in allocateRegisters()
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| D | nv50_ir_emit_nvc0.cpp | 2752 case OP_SAD: in emitInstruction()
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