| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInfo.td | 135 let OperandType = "OPERAND_BASIC_BLOCK" in
138 let OperandType = "OPERAND_LOCAL" in
141 let OperandType = "OPERAND_GLOBAL" in
144 let OperandType = "OPERAND_I32IMM" in
147 let OperandType = "OPERAND_I64IMM" in
150 let OperandType = "OPERAND_F32IMM" in
153 let OperandType = "OPERAND_F64IMM" in
156 let OperandType = "OPERAND_VEC_I8IMM" in
159 let OperandType = "OPERAND_VEC_I16IMM" in
162 let OperandType = "OPERAND_VEC_I32IMM" in
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| D | WebAssemblySetP2AlignOperands.cpp | 65 assert(MI.getDesc().OpInfo[OperandNo].OperandType == in rewriteP2Align()
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| D | WebAssemblyMCInstLower.cpp | 235 if (Info.OperandType == WebAssembly::OPERAND_TYPEINDEX) { in lower()
259 } else if (Info.OperandType == WebAssembly::OPERAND_SIGNATURE) { in lower()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 48 enum OperandType { enum
87 uint8_t OperandType; variable
110 return OperandType >= MCOI::OPERAND_FIRST_GENERIC && in isGenericType()
111 OperandType <= MCOI::OPERAND_LAST_GENERIC; in isGenericType()
116 return OperandType - MCOI::OPERAND_FIRST_GENERIC; in getGenericTypeIndex()
120 return OperandType >= MCOI::OPERAND_FIRST_GENERIC_IMM && in isGenericImm()
121 OperandType <= MCOI::OPERAND_LAST_GENERIC_IMM; in isGenericImm()
126 return OperandType - MCOI::OPERAND_FIRST_GENERIC_IMM; in getGenericImmIndex()
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/test/ |
| D | operand_test.cpp | 81 TEST(OperandType, NoneTypeClassification) { in TEST() argument
87 TEST(OperandType, EndSentinelTypeClassification) { in TEST() argument
93 TEST(OperandType, WidthForcingTypeClassification) { in TEST() argument
99 TEST(OperandType, EachTypeIsEitherConcreteOrOptionalNotBoth) { in TEST() argument
111 TEST(OperandType, EachVariableTypeIsOptional) { in TEST() argument
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| /third_party/spirv-tools/test/ |
| D | operand_test.cpp | 81 TEST(OperandType, NoneTypeClassification) { in TEST() argument
87 TEST(OperandType, EndSentinelTypeClassification) { in TEST() argument
93 TEST(OperandType, WidthForcingTypeClassification) { in TEST() argument
99 TEST(OperandType, EachTypeIsEitherConcreteOrOptionalNotBoth) { in TEST() argument
111 TEST(OperandType, EachVariableTypeIsOptional) { in TEST() argument
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| /third_party/skia/third_party/externals/spirv-tools/test/ |
| D | operand_test.cpp | 81 TEST(OperandType, NoneTypeClassification) { in TEST() argument
87 TEST(OperandType, EndSentinelTypeClassification) { in TEST() argument
93 TEST(OperandType, WidthForcingTypeClassification) { in TEST() argument
99 TEST(OperandType, EachTypeIsEitherConcreteOrOptionalNotBoth) { in TEST() argument
111 TEST(OperandType, EachVariableTypeIsOptional) { in TEST() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| D | WebAssemblyMCCodeEmitter.cpp | 93 << int(Info.OperandType) << "\n"); in encodeInstruction()
94 switch (Info.OperandType) { in encodeInstruction()
130 if (Info.OperandType == WebAssembly::OPERAND_F32IMM) { in encodeInstruction()
136 assert(Info.OperandType == WebAssembly::OPERAND_F64IMM); in encodeInstruction()
145 switch (Info.OperandType) { in encodeInstruction()
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| D | WebAssemblyInstPrinter.cpp | 159 if (Desc.OpInfo[I].OperandType != WebAssembly::OPERAND_BASIC_BLOCK) in printInst()
230 if (Info.OperandType == WebAssembly::OPERAND_F32IMM) { in printOperand()
235 assert(Info.OperandType == WebAssembly::OPERAND_F64IMM); in printOperand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | X87.cpp | 210 #define TestFild(OperandType, Size, MemorySize, FpType, IntType) \ in TEST_F() argument
215 __ fild##OperandType(dwordAddress(T0)); \ in TEST_F()
225 << "(" #OperandType ", " #Size ", " #MemorySize ", " #FpType \ in TEST_F()
237 #define TestFistp(OperandType, Size, MemorySize, FpType, IntType) \ in TEST_F() argument
244 __ fild##OperandType(dwordAddress(T0)); \ in TEST_F()
245 __ fistp##OperandType(dwordAddress(T1)); \ in TEST_F()
255 << "(" #OperandType ", " #Size ", " #MemorySize ", " #FpType \ in TEST_F()
259 << "(" #OperandType ", " #Size ", " #MemorySize ", " #FpType \ in TEST_F()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCTargetDesc.h | 100 enum OperandType { enum
104 inline bool isVpred(OperandType op) { in isVpred()
108 return isVpred(static_cast<OperandType>(op)); in isVpred()
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| D | ARMMCTargetDesc.cpp | 269 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL) in evaluateBranch()
299 if (Info->get(Inst.getOpcode()).OpInfo[OpId].OperandType != in evaluateBranch()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFDebugFrame.cpp | 163 ArrayRef<CFIProgram::OperandType[2]> CFIProgram::getOperandTypes() { in getOperandTypes()
164 static OperandType OpTypes[DW_CFA_restore+1][2]; in getOperandTypes()
167 return ArrayRef<OperandType[2]>(&OpTypes[0], DW_CFA_restore+1); in getOperandTypes()
213 return ArrayRef<OperandType[2]>(&OpTypes[0], DW_CFA_restore+1); in getOperandTypes()
222 OperandType Type = getOperandTypes()[Opcode][OperandIdx]; in printOperand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.td | 735 let OperandType = opType#"_INT16";
741 let OperandType = opType#"_FP16";
747 let OperandType = opType#"_INT32";
753 let OperandType = opType#"_FP32";
759 let OperandType = opType#"_V2INT16";
765 let OperandType = opType#"_V2FP16";
776 let OperandType = opType#"_INT64";
781 let OperandType = opType#"_FP64";
810 let OperandType = "OPERAND_REG_IMM_INT32";
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| D | SIInstrInfo.h | 701 bool isInlineConstant(const MachineOperand &MO, uint8_t OperandType) const;
705 return isInlineConstant(MO, OpInfo.OperandType); in isInlineConstant()
726 return isInlineConstant(MO, MI.getDesc().OpInfo[OpIdx].OperandType); in isInlineConstant()
743 return isInlineConstant(MO, MI.getDesc().OpInfo[OpIdx].OperandType); in isInlineConstant()
753 return MO.isImm() && !isInlineConstant(MO, OpInfo.OperandType); in isLiteralConstant()
814 assert(OpInfo.OperandType == MCOI::OPERAND_IMMEDIATE); in getOpSize()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCInstrAnalysis.cpp | 29 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) in evaluateBranch()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsBaseInfo.h | 132 enum OperandType : unsigned { enum
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| D | MipsMCTargetDesc.cpp | 145 switch (Info->get(Inst.getOpcode()).OpInfo[NumOps - 1].OperandType) { in evaluateBranch()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/DWARF/ |
| D | DWARFDebugFrame.h | 107 enum OperandType { enum
121 static ArrayRef<OperandType[2]> getOperandTypes();
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86Disassembler.cpp | 739 static uint16_t name(struct InternalInstruction *insn, OperandType type, \
842 (Reg)fixupRegValue(insn, (OperandType)op->type, insn->vvvv, &valid); in fixupReg()
847 insn->reg = (Reg)fixupRegValue(insn, (OperandType)op->type, in fixupReg()
855 insn, (OperandType)op->type, insn->eaBase - insn->eaRegBase, &valid); in fixupReg()
1514 switch ((OperandType)Op.type) { in readOperands()
1872 OperandType type = (OperandType)operand.type; in translateImmediate()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 69 let OperandType = "OPERAND_MEMORY";
102 let OperandType = "OPERAND_MEMORY";
110 let OperandType = "OPERAND_MEMORY";
120 let OperandType = "OPERAND_MEMORY";
128 let OperandType = "OPERAND_MEMORY";
136 let OperandType = "OPERAND_MEMORY";
145 let OperandType = "OPERAND_MEMORY";
161 let OperandType = "OPERAND_MEMORY";
174 let OperandType = "OPERAND_PCREL";
181 let OperandType = "OPERAND_PCREL";
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiMCTargetDesc.cpp | 101 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType == in evaluateBranch()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Utils/ |
| D | RISCVBaseInfo.h | 75 enum OperandType : unsigned { enum
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZOperands.td | 28 let OperandType = "OPERAND_IMMEDIATE";
67 let OperandType = "OPERAND_PCREL" in {
111 let OperandType = "OPERAND_MEMORY";
515 let OperandType = "OPERAND_IMMEDIATE" in
665 let OperandType = "OPERAND_IMMEDIATE";
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | AMDGPUMCTargetDesc.cpp | 118 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != in evaluateBranch()
|