Searched refs:PCReg (Results 1 – 3 of 3) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 152 MCRegister PCReg; // Program counter register variable
362 PCReg = PC; in InitMCRegisterInfo()
436 return PCReg; in getProgramCounter()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 1791 Register PCReg = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass); in insertIndirectBranch() local
1797 MachineInstr *GetPC = BuildMI(MBB, I, DL, get(AMDGPU::S_GETPC_B64), PCReg); in insertIndirectBranch()
1802 .addReg(PCReg, RegState::Define, AMDGPU::sub0) in insertIndirectBranch()
1803 .addReg(PCReg, 0, AMDGPU::sub0) in insertIndirectBranch()
1806 .addReg(PCReg, RegState::Define, AMDGPU::sub1) in insertIndirectBranch()
1807 .addReg(PCReg, 0, AMDGPU::sub1) in insertIndirectBranch()
1812 .addReg(PCReg, RegState::Define, AMDGPU::sub0) in insertIndirectBranch()
1813 .addReg(PCReg, 0, AMDGPU::sub0) in insertIndirectBranch()
1816 .addReg(PCReg, RegState::Define, AMDGPU::sub1) in insertIndirectBranch()
1817 .addReg(PCReg, 0, AMDGPU::sub1) in insertIndirectBranch()
[all …]
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| D | AMDGPULegalizerInfo.cpp | 1655 Register PCReg = PtrTy.getSizeInBits() != 32 ? DstReg : in buildPCRelGlobalAddress() local
1659 .addDef(PCReg); in buildPCRelGlobalAddress()
1667 B.getMRI()->setRegClass(PCReg, &AMDGPU::SReg_64RegClass); in buildPCRelGlobalAddress()
1670 B.buildExtract(DstReg, PCReg, 0); in buildPCRelGlobalAddress()
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