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Searched refs:PIPE_CONTROL_CACHE_FLUSH_BITS (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/iris/
Diris_pipe_control.c62 if ((flags & PIPE_CONTROL_CACHE_FLUSH_BITS) && in iris_emit_pipe_control_flush()
76 flags & PIPE_CONTROL_CACHE_FLUSH_BITS); in iris_emit_pipe_control_flush()
77 flags &= ~(PIPE_CONTROL_CACHE_FLUSH_BITS | PIPE_CONTROL_CS_STALL); in iris_emit_pipe_control_flush()
192 const uint32_t all_flush_bits = (PIPE_CONTROL_CACHE_FLUSH_BITS | in iris_emit_buffer_barrier_for()
319 if (bits & PIPE_CONTROL_CACHE_FLUSH_BITS) in iris_emit_buffer_barrier_for()
Diris_context.h363 #define PIPE_CONTROL_CACHE_FLUSH_BITS \ macro
Diris_state.c7649 if ((flags & (PIPE_CONTROL_CACHE_FLUSH_BITS | in batch_mark_sync_for_pipe_control()
8146 (flags & (PIPE_CONTROL_CACHE_FLUSH_BITS | PIPE_CONTROL_CACHE_INVALIDATE_BITS)) != 0; in iris_emit_raw_pipe_control()
/third_party/mesa3d/src/gallium/drivers/crocus/
Dcrocus_pipe_control.c65 (flags & PIPE_CONTROL_CACHE_FLUSH_BITS) && in crocus_emit_pipe_control_flush()
79 flags & PIPE_CONTROL_CACHE_FLUSH_BITS); in crocus_emit_pipe_control_flush()
80 flags &= ~(PIPE_CONTROL_CACHE_FLUSH_BITS | PIPE_CONTROL_CS_STALL); in crocus_emit_pipe_control_flush()
Dcrocus_context.h262 #define PIPE_CONTROL_CACHE_FLUSH_BITS \ macro
/third_party/mesa3d/docs/relnotes/
D22.1.0.rst2036 - iris: Add FLUSH_HDC to PIPE_CONTROL_CACHE_FLUSH_BITS
D22.2.0.rst3394 - iris: Add FLUSH_HDC to PIPE_CONTROL_CACHE_FLUSH_BITS