Searched refs:PIPE_MAX_SHADER_OUTPUTS (Results 1 – 25 of 39) sorted by relevance
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54 ubyte output_semantic_name[PIPE_MAX_SHADER_OUTPUTS]; /**< TGSI_SEMANTIC_x */55 ubyte output_semantic_index[PIPE_MAX_SHADER_OUTPUTS];56 ubyte output_usagemask[PIPE_MAX_SHADER_OUTPUTS];57 ubyte output_streams[PIPE_MAX_SHADER_OUTPUTS];75 ubyte output_array_first[PIPE_MAX_SHADER_OUTPUTS];
99 unsigned out_tmp_index[PIPE_MAX_SHADER_OUTPUTS];
385 ubyte output_semantic[PIPE_MAX_SHADER_OUTPUTS];386 ubyte output_usagemask[PIPE_MAX_SHADER_OUTPUTS];387 ubyte output_readmask[PIPE_MAX_SHADER_OUTPUTS];388 ubyte output_streams[PIPE_MAX_SHADER_OUTPUTS];389 ubyte output_type[PIPE_MAX_SHADER_OUTPUTS]; /* enum nir_alu_type */
308 ubyte output_semantic_name[PIPE_MAX_SHADER_OUTPUTS];309 ubyte output_semantic_index[PIPE_MAX_SHADER_OUTPUTS];310 ubyte output_usage_mask[PIPE_MAX_SHADER_OUTPUTS];
18 ubyte output_map[PIPE_MAX_SHADER_OUTPUTS];
215 struct ureg_dst dst[PIPE_MAX_SHADER_OUTPUTS]; in compile_passthrough_vs()
49 } attrib[PIPE_MAX_SHADER_OUTPUTS];
79 } attrib[PIPE_MAX_SHADER_OUTPUTS];
63 #define MAX_VERTEX_SIZE ((2 + PIPE_MAX_SHADER_OUTPUTS) * 4 * sizeof(float))
63 uint8_t const_attribs[PIPE_MAX_SHADER_OUTPUTS];66 uint8_t linear_attribs[PIPE_MAX_SHADER_OUTPUTS];69 uint8_t perspect_attribs[PIPE_MAX_SHADER_OUTPUTS];
76 uint texcoord_gen_slot[PIPE_MAX_SHADER_OUTPUTS];
46 uint flat_attribs[PIPE_MAX_SHADER_OUTPUTS]; /* flatshaded attribs */
44 for (i = 0; i < PIPE_MAX_SHADER_OUTPUTS; i++) { in draw_tes_get_input_index()
75 struct r600_shader_io output[PIPE_MAX_SHADER_OUTPUTS];
142 LLVMValueRef outputs[PIPE_MAX_SHADER_OUTPUTS]; in llvm_fragment_body()162 for (i = 0; i < PIPE_MAX_SHADER_OUTPUTS; ++i) { in llvm_fragment_body()
257 if (semantic_index < PIPE_MAX_SHADER_OUTPUTS && in setup_point_coefficients()
154 if (info->io.sampleMask < PIPE_MAX_SHADER_OUTPUTS) in nvc0_fp_assign_output_slots()160 if (info->io.fragDepth < PIPE_MAX_SHADER_OUTPUTS) in nvc0_fp_assign_output_slots()448 if (info->io.sampleMask < PIPE_MAX_SHADER_OUTPUTS) in nvc0_fp_gen_header()
60 unsigned output_mapping[PIPE_MAX_SHADER_OUTPUTS];
1409 for (unsigned i = 0; i < PIPE_MAX_SHADER_OUTPUTS; ++i) { in ShaderFindOutputMapping()
310 const RegisterVec4 *so_gpr[PIPE_MAX_SHADER_OUTPUTS]; in emit_stream()311 unsigned start_comp[PIPE_MAX_SHADER_OUTPUTS]; in emit_stream()
240 if (info->io.sampleMask < PIPE_MAX_SHADER_OUTPUTS) { in nv50_fragprog_assign_slots()245 if (info->io.fragDepth < PIPE_MAX_SHADER_OUTPUTS) in nv50_fragprog_assign_slots()
67 #define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */ macro
874 struct ureg_dst dst[PIPE_MAX_SHADER_OUTPUTS]; in util_make_geometry_passthrough_shader()1100 struct ureg_dst dst[PIPE_MAX_SHADER_OUTPUTS]; in util_make_tess_ctrl_passthrough_shader()
154 struct lp_tgsi_channel_info output[PIPE_MAX_SHADER_OUTPUTS][4];
499 for (index = 0; index < PIPE_MAX_SHADER_OUTPUTS; ++index) { in dump_info()