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Searched refs:PKT3_SET_UCONFIG_REG (Results 1 – 9 of 9) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_cs.h148 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0)); in radeon_set_uconfig_reg_seq()
158 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 1)); in radeon_set_uconfig_reg_seq_perfctr()
180 opcode = PKT3_SET_UCONFIG_REG; in radeon_set_uconfig_reg_idx()
202 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0) | PKT3_RESET_FILTER_CAM(filter_cam_workaround)); in radeon_set_perfctr_reg()
Dradv_device_generated_commands.c837 opcode = PKT3_SET_UCONFIG_REG; in build_dgc_prepare_shader()
/third_party/mesa3d/src/gallium/drivers/r600/
Dr600_cs.h185 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0)); in radeon_set_uconfig_reg_seq()
201 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0)); in radeon_set_uconfig_reg_idx()
Dr600d_common.h88 #define PKT3_SET_UCONFIG_REG 0x79 /* GFX7 and later */ macro
Deg_debug.c164 op == PKT3_SET_UCONFIG_REG || in ac_parse_packet3()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_build_pm4.h140 radeon_emit(PKT3(PKT3_SET_UCONFIG_REG, num, perfctr)); \
161 __opcode = PKT3_SET_UCONFIG_REG; \
Dsi_pm4.c96 opcode = PKT3_SET_UCONFIG_REG; in si_pm4_set_reg()
/third_party/mesa3d/src/amd/common/
Dsid.h242 #define PKT3_SET_UCONFIG_REG 0x79 /* new for CIK */ macro
Dac_debug.c275 if (op == PKT3_SET_CONTEXT_REG || op == PKT3_SET_CONFIG_REG || op == PKT3_SET_UCONFIG_REG || in ac_parse_packet3()
291 case PKT3_SET_UCONFIG_REG: in ac_parse_packet3()