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Searched refs:RADV_QUEUE_COMPUTE (Results 1 – 8 of 8) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_sqtt.c70 (family == RADV_QUEUE_COMPUTE in radv_emit_wait_for_idle()
198 if (qf == RADV_QUEUE_COMPUTE) { in radv_emit_thread_trace_start()
262 if (qf == RADV_QUEUE_COMPUTE) { in radv_emit_thread_trace_stop()
553 case RADV_QUEUE_COMPUTE: in radv_begin_thread_trace()
622 case RADV_QUEUE_COMPUTE: in radv_end_thread_trace()
Dradv_meta_copy.c100 cs = cmd_buffer->qf == RADV_QUEUE_COMPUTE || in copy_buffer_to_image()
367 cs = cmd_buffer->qf == RADV_QUEUE_COMPUTE || in copy_image()
Dradv_device.c652 pdevice->vk_queue_to_radv[idx] = RADV_QUEUE_COMPUTE; in radv_physical_device_init_queue_table()
2924 queue->ace_internal_state->qf = RADV_QUEUE_COMPUTE; in radv_queue_init_ace_internal_state()
4474 if ((queue->qf == RADV_QUEUE_COMPUTE && !descriptor_bo && task_rings_bo) || in radv_update_preamble_cs()
4572 case RADV_QUEUE_COMPUTE: in radv_update_preamble_cs()
4597 const bool is_mec = queue->qf == RADV_QUEUE_COMPUTE && gfx_level >= GFX7; in radv_update_preamble_cs()
Dradv_image.c2313 (queue_mask & (1u << RADV_QUEUE_COMPUTE)) && !radv_image_use_dcc_image_stores(device, image)) in radv_layout_dcc_compressed()
2337 (queue_mask & (1u << RADV_QUEUE_COMPUTE))) in radv_layout_fmask_compressed()
Dsi_cmd_buffer.c1429 bool is_compute = cmd_buffer->qf == RADV_QUEUE_COMPUTE; in si_emit_cache_flush()
Dradv_private.h256 RADV_QUEUE_COMPUTE, enumerator
Dradv_meta_clear.c2316 cs = cmd_buffer->qf == RADV_QUEUE_COMPUTE || in radv_CmdClearColorImage()
Dradv_cmd_buffer.c355 return cmd_buffer->qf == RADV_QUEUE_COMPUTE && in radv_cmd_buffer_uses_mec()
366 case RADV_QUEUE_COMPUTE: in radv_queue_family_to_ring()
6166 if (secondary->qf == RADV_QUEUE_COMPUTE) { in radv_CmdExecuteCommands()
9556 if (cmd_buffer->qf == RADV_QUEUE_COMPUTE && in radv_handle_image_transition()