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Searched refs:R_028A18_VGT_HOS_MAX_TESS_LEVEL (Results 1 – 5 of 5) sorted by relevance

/third_party/mesa3d/src/amd/common/
Dac_shadowed_regs.c112 R_028A18_VGT_HOS_MAX_TESS_LEVEL,
113 R_028A1C_VGT_HOS_MIN_TESS_LEVEL - R_028A18_VGT_HOS_MAX_TESS_LEVEL + 4,
327 R_028A18_VGT_HOS_MAX_TESS_LEVEL,
328 R_028A1C_VGT_HOS_MIN_TESS_LEVEL - R_028A18_VGT_HOS_MAX_TESS_LEVEL + 4,
668 R_028A18_VGT_HOS_MAX_TESS_LEVEL,
669 R_028A1C_VGT_HOS_MIN_TESS_LEVEL - R_028A18_VGT_HOS_MAX_TESS_LEVEL + 4,
991 R_028A18_VGT_HOS_MAX_TESS_LEVEL,
992 R_028A1C_VGT_HOS_MIN_TESS_LEVEL - R_028A18_VGT_HOS_MAX_TESS_LEVEL + 4,
1950 set_context_reg_seq_array(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, SET(VgtHosMaxTessLevelGfx9)); in gfx9_emulate_clear_state()
2659 set_context_reg_seq_array(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, SET(VgtHosMaxTessLevelNv10)); in gfx10_emulate_clear_state()
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/third_party/mesa3d/src/amd/vulkan/
Dsi_cmd_buffer.c216 radeon_set_context_reg(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64)); in si_emit_graphics()
/third_party/mesa3d/src/gallium/drivers/r600/
Devergreend.h2240 #define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x00028A18 macro
Dr600d.h3129 #define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x028A18 macro
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state.c5591 si_pm4_set_reg(pm4, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64)); in si_init_cs_preamble_state()