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Searched refs:SETEQ (Results 1 – 25 of 56) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp311 case ISD::SETEQ: in softenSetCCOperands()
2856 (Cond != ISD::SETEQ && Cond != ISD::SETNE)) in foldSetCCWithAnd()
2940 NewCond = ISD::CondCode::SETEQ; in optimizeSetCCOfSignedTruncationCheck()
2942 NewCond = ISD::CondCode::SETEQ; in optimizeSetCCOfSignedTruncationCheck()
3009 assert((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in optimizeSetCCByHoistingAndByConstFromLogicalShift()
3082 assert((Cond == ISD::SETEQ || Cond == ISD::SETNE) && "Unexpected condcode"); in foldSetCCWithBinOp()
3159 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
3161 if ((C1 == 0) == (Cond == ISD::SETEQ)) { in SimplifySetCC()
3168 Cond = ISD::SETEQ; in SimplifySetCC()
3193 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; in SimplifySetCC()
[all …]
DLegalizeIntegerTypes.cpp1356 case ISD::SETEQ: in PromoteSetCCOperands()
1866 N->getOperand(2), ISD::SETEQ); in ExpandIntegerResult()
2148 ISD::SETEQ); in ExpandShiftWithUnknownAmountBit()
2241 SDValue IsHiEq = DAG.getSetCC(DL, CCT, LHSH, RHSH, ISD::SETEQ); in ExpandIntRes_MINMAX()
3186 SDValue HHEQ0 = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTZero, ISD::SETEQ); in ExpandIntRes_MULFIX()
3192 SDValue HHEQ = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTNeg1, ISD::SETEQ); in ExpandIntRes_MULFIX()
3199 SDValue HHEQ0 = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTZero, ISD::SETEQ); in ExpandIntRes_MULFIX()
3205 SDValue HHEQ = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTNeg1, ISD::SETEQ); in ExpandIntRes_MULFIX()
3271 ISD::SETEQ : ISD::SETNE); in ExpandIntRes_SADDSUBO()
3811 if (CCCode == ISD::SETEQ || CCCode == ISD::SETNE) { in IntegerExpandSetCCOperands()
[all …]
DSelectionDAGDumper.cpp424 case ISD::SETEQ: return "seteq"; in getOperationName()
DSelectionDAGBuilder.cpp2094 ISD::CondCode Opc = InvertCond ? ISD::SETNE : ISD::SETEQ; in EmitBranchForMergedCondition()
2244 if (Cases[0].CC == ISD::SETEQ && Cases[0].TrueBB == Cases[1].ThisBB) in ShouldEmitAsBranches()
2331 CaseBlock CB(ISD::SETEQ, CondVal, ConstantInt::getTrue(*DAG.getContext()), in visitBr()
2366 CB.CC == ISD::SETEQ) in visitSwitchCase()
2369 CB.CC == ISD::SETEQ) { in visitSwitchCase()
2729 ISD::SETEQ); in visitBitTestCase()
6403 SDValue IsZeroShift = DAG.getSetCC(sdl, CCVT, ShAmt, Zero, ISD::SETEQ); in visitIntrinsicCall()
10140 ISD::SETEQ); in lowerWorkItem()
10304 CC = ISD::SETEQ; in lowerWorkItem()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td73 defm EQ : ComparisonInt<SETEQ, "eq ", 0x46, 0x51>;
90 [(set I32:$dst, (setcc I32:$src, 0, SETEQ))],
93 [(set I32:$dst, (setcc I64:$src, 0, SETEQ))],
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp1272 case ISD::SETEQ: in combineFMinMaxLegacy()
1754 SDValue C3 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, C2, C1, ISD::SETEQ); in LowerUDIVREM64()
1776 SDValue C6 = DAG.getSelectCC(DL, Sub2_Hi, RHS_Hi, C5, C4, ISD::SETEQ); in LowerUDIVREM64()
1810 SDValue REM_Lo = DAG.getSelectCC(DL, RHS_Hi, Zero, REM_Part, LHS_Hi, ISD::SETEQ); in LowerUDIVREM64()
1814 SDValue DIV_Hi = DAG.getSelectCC(DL, RHS_Hi, Zero, DIV_Part, Zero, ISD::SETEQ); in LowerUDIVREM64()
1884 ISD::SETEQ); in LowerUDIVREM()
1898 ISD::SETEQ); in LowerUDIVREM()
1935 Quotient, Quotient_A_One, ISD::SETEQ); in LowerUDIVREM()
1939 Quotient_S_One, Div, ISD::SETEQ); in LowerUDIVREM()
1951 Remainder, Remainder_S_Den, ISD::SETEQ); in LowerUDIVREM()
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DSIInsertSkips.cpp196 case ISD::SETEQ: in kill()
DAMDGPUInstructions.td244 def COND_OEQ : PatFrags<(ops), [(OtherVT SETOEQ), (OtherVT SETEQ)]>;
281 def COND_EQ : PatFrags<(ops), [(OtherVT SETEQ), (OtherVT SETUEQ)]>;
DR600ISelLowering.cpp890 DAG.getCondCode(ISD::SETEQ)); in lowerFP_TO_UINT()
900 DAG.getCondCode(ISD::SETEQ)); in lowerFP_TO_SINT()
1989 case ISD::SETEQ: { in PerformDAGCombine()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp2917 case ISD::SETEQ: { in get32BitZExtCompare()
3091 case ISD::SETEQ: { in get32BitSExtCompare()
3262 case ISD::SETEQ: { in get64BitZExtCompare()
3419 case ISD::SETEQ: { in get64BitSExtCompare()
3702 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
3746 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
3794 case ISD::SETEQ: in SelectCC()
3821 case ISD::SETEQ: in SelectCC()
3865 case ISD::SETEQ: in getPredicateForSetCC()
3902 case ISD::SETEQ: return 2; // Bit #2 = SETOEQ in getCRIdxForSetCC()
[all …]
DPPCInstrInfo.td3408 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETEQ)),
3506 defm : ExtSetCCPat<SETEQ,
3616 defm : ExtSetCCShiftPat<SETEQ,
3635 def : Pat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETEQ)),
3637 def : Pat<(i1 (setcc i32:$s1, immZExt16:$imm, SETEQ)),
3651 def : Pat<(i1 (setcc i32:$s1, imm:$imm, SETEQ)),
3663 def : Pat<(i1 (setcc i32:$s1, i32:$s2, SETEQ)),
3675 def : Pat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETEQ)),
3677 def : Pat<(i1 (setcc i64:$s1, immZExt16:$imm, SETEQ)),
3691 def : Pat<(i1 (setcc i64:$s1, imm64ZExt32:$imm, SETEQ)),
[all …]
DPPCInstrQPX.td1020 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETEQ),
1067 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETEQ),
1122 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETEQ)),
1143 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETEQ)),
1164 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETEQ)),
DPPCInstrSPE.td856 def : Pat<(f32 (selectcc i1:$lhs, i1:$rhs, f32:$tval, f32:$fval, SETEQ)),
877 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETEQ)),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenDAGISel.inc1401 /* 2516*/ OPC_CheckChild2CondCode, ISD::SETEQ,
1412 …i64] }, (imm:{ *:[i64] })<<P:Predicate_immZExt5_64>>:$p)), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
1443 /* 2589*/ OPC_CheckChild2CondCode, ISD::SETEQ,
1454 …i64] }, (imm:{ *:[i64] })<<P:Predicate_immZExt5_64>>:$p)), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
1490 /* 2667*/ OPC_CheckChild2CondCode, ISD::SETEQ,
1501 …P:Predicate_immZExt5_64>>:$p), GPR64Opnd:{ *:[i64] }:$rs), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
1533 /* 2741*/ OPC_CheckChild2CondCode, ISD::SETEQ,
1544 …P:Predicate_immZExt5_64>>:$p), GPR64Opnd:{ *:[i64] }:$rs), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
1573 /* 2806*/ OPC_CheckChild2CondCode, ISD::SETEQ,
1586 …:$lhs, (imm:{ *:[i64] })<<P:Predicate_PowerOf2LO>>:$mask), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h1067 SETEQ, // 1 X 0 0 1 True if equal enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DAnalysis.cpp225 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ; in getFCmpCodeWithoutNaN()
240 case ICmpInst::ICMP_EQ: return ISD::SETEQ; in getICmpCondCode()
DTargetLoweringBase.cpp538 CCs[RTLIB::OEQ_F32] = ISD::SETEQ; in InitCmpLibcallCCs()
539 CCs[RTLIB::OEQ_F64] = ISD::SETEQ; in InitCmpLibcallCCs()
540 CCs[RTLIB::OEQ_F128] = ISD::SETEQ; in InitCmpLibcallCCs()
541 CCs[RTLIB::OEQ_PPCF128] = ISD::SETEQ; in InitCmpLibcallCCs()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h1001 X86_INTRINSIC_DATA(sse_comieq_ss, COMI, X86ISD::COMI, ISD::SETEQ),
1018 X86_INTRINSIC_DATA(sse_ucomieq_ss, COMI, X86ISD::UCOMI, ISD::SETEQ),
1025 X86_INTRINSIC_DATA(sse2_comieq_sd, COMI, X86ISD::COMI, ISD::SETEQ),
1072 X86_INTRINSIC_DATA(sse2_ucomieq_sd, COMI, X86ISD::UCOMI, ISD::SETEQ),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp810 case ISD::SETEQ: in IntCondCCodeToICC()
1259 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, ShAmt, Zero, ISD::SETEQ); in LowerSHL_PARTS()
1316 SDValue ShiftIsZero = DAG.getSetCC(dl, MVT::i32, ShAmt, Zero, ISD::SETEQ); in LowerSRL_PARTS()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsDSPInstrInfo.td1421 def : DSPSetCCPat<PseudoCMP_EQ_PH, PseudoPICK_PH, v2i16, SETEQ>;
1427 def : DSPSetCCPat<PseudoCMPU_EQ_QB, PseudoPICK_QB, v4i8, SETEQ>;
1434 def : DSPSelectCCPat<PseudoCMP_EQ_PH, PseudoPICK_PH, v2i16, SETEQ>;
1440 def : DSPSelectCCPat<PseudoCMPU_EQ_QB, PseudoPICK_QB, v4i8, SETEQ>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp200 { RTLIB::OEQ_F64, "__mspabi_cmpd", ISD::SETEQ }, in MSP430TargetLowering()
206 { RTLIB::OEQ_F32, "__mspabi_cmpf", ISD::SETEQ }, in MSP430TargetLowering()
1052 case ISD::SETEQ: in EmitCMP()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.td85 [{return (N->getZExtValue() == ISD::SETEQ);}]>;
105 [{return (N->getZExtValue() == ISD::SETEQ);}]>;
DBPFISelLowering.cpp691 SET_NEWCC(SETEQ, JEQ); in EmitInstrWithCustomInserter()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenDAGISel.inc3636 /* 7721*/ OPC_CheckChild2CondCode, ISD::SETEQ,
3648 …s1, (shl:{ *:[i64] } 1:{ *:[i64] }, i32:{ *:[i32] }:$sa)), 0:{ *:[i64] }, SETEQ:{ *:[Other] })) - …
3654 /* 7766*/ OPC_CheckChild2CondCode, ISD::SETEQ,
3666 …s1, (shl:{ *:[i32] } 1:{ *:[i32] }, i32:{ *:[i32] }:$sa)), 0:{ *:[i32] }, SETEQ:{ *:[Other] })) - …
3696 /* 7870*/ OPC_CheckChild2CondCode, ISD::SETEQ,
3708 …1:{ *:[i64] }, i32:{ *:[i32] }:$sa), i64:{ *:[i64] }:$s1), 0:{ *:[i64] }, SETEQ:{ *:[Other] })) - …
3714 /* 7915*/ OPC_CheckChild2CondCode, ISD::SETEQ,
3726 …1:{ *:[i32] }, i32:{ *:[i32] }:$sa), i32:{ *:[i32] }:$s1), 0:{ *:[i32] }, SETEQ:{ *:[Other] })) - …
3761 /* 8033*/ OPC_CheckChild2CondCode, ISD::SETEQ,
3775 …s1, (shl:{ *:[i64] } 1:{ *:[i64] }, i32:{ *:[i32] }:$sa)), 0:{ *:[i64] }, SETEQ:{ *:[Other] })) - …
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCISelLowering.cpp55 case ISD::SETEQ: in ISDCCtoARCCC()

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