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Searched refs:SHADER_OPCODE_TXL (Results 1 – 11 of 11) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
Dbrw_lower_logical_sends.cpp476 const bool has_lod = (op == SHADER_OPCODE_TXL || op == FS_OPCODE_TXB || in lower_sampler_logical_send_gfx4()
611 case SHADER_OPCODE_TXL: in lower_sampler_logical_send_gfx5()
691 case SHADER_OPCODE_TXL: in sampler_msg_type()
919 case SHADER_OPCODE_TXL: in lower_sampler_logical_send_gfx7()
920 if (devinfo->ver >= 9 && op == SHADER_OPCODE_TXL && lod.is_zero()) { in lower_sampler_logical_send_gfx7()
2596 lower_sampler_logical_send(ibld, inst, SHADER_OPCODE_TXL); in lower_logical_sends()
Dbrw_shader.cpp240 case SHADER_OPCODE_TXL: in brw_instruction_name()
902 opcode == SHADER_OPCODE_TXL || in is_tex()
Dbrw_ir_vec4.h345 case SHADER_OPCODE_TXL: in reads_g0_implicitly()
Dbrw_vec4_generator.cpp123 case SHADER_OPCODE_TXL: in generate_tex()
178 case SHADER_OPCODE_TXL: in generate_tex()
1803 case SHADER_OPCODE_TXL: in generate_code()
Dbrw_fs_generator.cpp1056 case SHADER_OPCODE_TXL: in generate_tex()
1124 case SHADER_OPCODE_TXL: in generate_tex()
2220 case SHADER_OPCODE_TXL: in generate_code()
Dbrw_vec4_nir.cpp2097 case nir_texop_tex: opcode = SHADER_OPCODE_TXL; break; in nir_emit_texture()
2098 case nir_texop_txl: opcode = SHADER_OPCODE_TXL; break; in nir_emit_texture()
2184 case SHADER_OPCODE_TXL: { in nir_emit_texture()
Dbrw_eu_defines.h325 SHADER_OPCODE_TXL, enumerator
Dbrw_ir_performance.cpp908 case SHADER_OPCODE_TXL: in instruction_desc()
Dbrw_schedule_instructions.cpp247 case SHADER_OPCODE_TXL: in set_latency_gfx7()
Dbrw_fs.cpp273 case SHADER_OPCODE_TXL: in is_control_source()
1095 case SHADER_OPCODE_TXL: in implied_mrf_writes()
4775 (inst->opcode == SHADER_OPCODE_TXL || in get_sampler_lowered_simd_width()
Dbrw_vec4.cpp363 case SHADER_OPCODE_TXL: in implied_mrf_writes()