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Searched refs:Size0 (Results 1 – 2 of 2) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonSubtarget.cpp278 unsigned Size0; in apply() local
279 MachineOperand *BaseOp0 = HII.getBaseAndOffset(L0, Offset0, Size0); in apply()
281 if (BaseOp0 == nullptr || !BaseOp0->isReg() || Size0 >= 32) in apply()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.cpp2261 unsigned Size0 = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getDefaultMappingVOP() local
2262 OpdsMapping[OpdIdx++] = AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size0); in getDefaultMappingVOP()
2962 unsigned Size0 = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping() local
2969 OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size0); in getInstrMapping()
3145 unsigned Size0 = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping() local
3153 OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size0); in getInstrMapping()