| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 2211 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2214 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2315 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2318 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2606 Ld->getAddressingMode() == ISD::UNINDEXED;
2636 cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
2644 St->getAddressingMode() == ISD::UNINDEXED;
2660 cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
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| D | ISDOpcodes.h | 986 UNINDEXED = 0, enumerator
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| D | BasicTTIImpl.h | 177 return ISD::UNINDEXED; in getISDIndexedMode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 6843 bool Indexed = AM != ISD::UNINDEXED; in getLoad()
6877 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, in getLoad()
6884 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, in getLoad()
6895 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, PtrInfo, in getExtLoad()
6903 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, in getExtLoad()
6955 dl.getIROrder(), VTs, ISD::UNINDEXED, false, VT, MMO)); in getStore()
6963 ISD::UNINDEXED, false, VT, MMO); in getStore()
7022 dl.getIROrder(), VTs, ISD::UNINDEXED, true, SVT, MMO)); in getTruncStore()
7030 ISD::UNINDEXED, true, SVT, MMO); in getTruncStore()
7074 bool Indexed = AM != ISD::UNINDEXED; in getMaskedLoad()
[all …]
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| D | LegalizeVectorTypes.cpp | 330 ISD::UNINDEXED, N->getExtensionType(), in ScalarizeVecRes_LOAD()
1512 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
1517 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
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| D | TargetLowering.cpp | 6675 assert(LD->getAddressingMode() == ISD::UNINDEXED && in expandUnalignedLoad()
6827 assert(ST->getAddressingMode() == ISD::UNINDEXED && in expandUnalignedStore()
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| D | SelectionDAGBuilder.cpp | 4353 ISD::UNINDEXED, false /* Truncating */, IsCompressing); in visitMaskedStore()
4556 ISD::UNINDEXED, ISD::NON_EXTLOAD, IsExpanding); in visitMaskedLoad()
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| D | DAGCombiner.cpp | 13798 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPreIndexedLoadStore()
14022 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPostIndexedLoadStore()
14114 assert(AM != ISD::UNINDEXED); in SplitIndexingFromLoad()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 452 if (AM != ISD::UNINDEXED) { in SelectLoad()
561 if (AM != ISD::UNINDEXED) { in SelectStore()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1524 if (AM == ISD::UNINDEXED) in tryARMIndexedLoad()
1630 if (AM == ISD::UNINDEXED) in tryT2IndexedLoad()
1689 if (AM == ISD::UNINDEXED) in tryMVEIndexedLoad()
1705 if (AM == ISD::UNINDEXED) in tryMVEIndexedLoad()
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| D | ARMISelLowering.cpp | 14075 DAG.getLoad(ISD::UNINDEXED, NewExtType, NewToVT, DL, Ch, BasePtr, Offset, in PerformSplittingToWideningLoad()
14078 DAG.getLoad(ISD::UNINDEXED, NewExtType, NewToVT, DL, Ch, NewPtr, Offset, in PerformSplittingToWideningLoad()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 777 // cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
778 // cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 1636 ISD::UNINDEXED, Ext, VT, DL, Chain, in LowerFormalArguments()
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| D | SIISelLowering.cpp | 7301 SDValue NewLoad = DAG.getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, in widenLoad()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 774 LD->getAddressingMode() != ISD::UNINDEXED || in isCalleeLoad()
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| D | X86ISelLowering.cpp | 25014 MemVT, MemIntr->getMemOperand(), ISD::UNINDEXED, in LowerINTRINSIC_W_CHAIN()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 11258 ISD::UNINDEXED, ISD::NON_EXTLOAD, false); in performLDNT1Combine()
11282 ISD::UNINDEXED, false, false); in performSTNT1Combine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenDAGISel.inc | 30157 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
30256 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenDAGISel.inc | 44709 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
44944 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenDAGISel.inc | 64690 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
64730 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
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