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Searched refs:VReg (Results 1 – 25 of 81) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyMachineFunctionInfo.h97 void stackifyVReg(unsigned VReg) { in stackifyVReg() argument
98 assert(MF.getRegInfo().getUniqueVRegDef(VReg)); in stackifyVReg()
99 auto I = Register::virtReg2Index(VReg); in stackifyVReg()
104 void unstackifyVReg(unsigned VReg) { in unstackifyVReg() argument
105 auto I = Register::virtReg2Index(VReg); in unstackifyVReg()
109 bool isVRegStackified(unsigned VReg) const { in isVRegStackified() argument
110 auto I = Register::virtReg2Index(VReg); in isVRegStackified()
117 void setWAReg(unsigned VReg, unsigned WAReg) { in setWAReg() argument
119 auto I = Register::virtReg2Index(VReg); in setWAReg()
123 unsigned getWAReg(unsigned VReg) const { in getWAReg() argument
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DWebAssemblyRegNumbering.cpp92 unsigned VReg = Register::index2VirtReg(VRegIdx); in runOnMachineFunction() local
94 if (MRI.use_empty(VReg)) in runOnMachineFunction()
97 if (MFI.isVRegStackified(VReg)) { in runOnMachineFunction()
98 LLVM_DEBUG(dbgs() << "VReg " << VReg << " -> WAReg " in runOnMachineFunction()
100 MFI.setWAReg(VReg, INT32_MIN | NumStackRegs++); in runOnMachineFunction()
103 if (MFI.getWAReg(VReg) == WebAssemblyFunctionInfo::UnusedReg) { in runOnMachineFunction()
104 LLVM_DEBUG(dbgs() << "VReg " << VReg << " -> WAReg " << CurReg << "\n"); in runOnMachineFunction()
105 MFI.setWAReg(VReg, CurReg++); in runOnMachineFunction()
DWebAssemblyRegColoring.cpp67 unsigned VReg) { in computeWeight() argument
69 for (MachineOperand &MO : MRI->reg_nodbg_operands(VReg)) in computeWeight()
101 unsigned VReg = Register::index2VirtReg(I); in runOnMachineFunction() local
102 if (MFI.isVRegStackified(VReg)) in runOnMachineFunction()
105 if (MRI->use_empty(VReg)) in runOnMachineFunction()
108 LiveInterval *LI = &Liveness->getInterval(VReg); in runOnMachineFunction()
110 LI->weight = computeWeight(MRI, MBFI, VReg); in runOnMachineFunction()
DWebAssemblyReplacePhysRegs.cpp87 unsigned VReg = WebAssembly::NoRegister; in runOnMachineFunction() local
91 if (VReg == WebAssembly::NoRegister) in runOnMachineFunction()
92 VReg = MRI.createVirtualRegister(RC); in runOnMachineFunction()
93 MO.setReg(VReg); in runOnMachineFunction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DSwiftErrorValueTracking.cpp37 auto VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVReg() local
38 VRegDefMap[Key] = VReg; in getOrCreateVReg()
39 VRegUpwardsUse[Key] = VReg; in getOrCreateVReg()
40 return VReg; in getOrCreateVReg()
46 const Value *Val, Register VReg) { in setCurrentVReg() argument
47 VRegDefMap[std::make_pair(MBB, Val)] = VReg; in setCurrentVReg()
59 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVRegDefAt() local
60 VRegDefUses[Key] = VReg; in getOrCreateVRegDefAt()
61 setCurrentVReg(MBB, Val, VReg); in getOrCreateVRegDefAt()
62 return VReg; in getOrCreateVRegDefAt()
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DMIRVRegNamerUtils.cpp42 for (const auto &VReg : VRegs) { in getVRegRenameMap() local
43 const unsigned Reg = VReg.getReg(); in getVRegRenameMap()
44 VRM[Reg] = createVirtualRegisterWithLowerName(Reg, GetUniqueVRegName(VReg)); in getVRegRenameMap()
123 unsigned VRegRenamer::createVirtualRegister(unsigned VReg) { in createVirtualRegister() argument
124 assert(Register::isVirtualRegister(VReg) && "Expected Virtual Registers"); in createVirtualRegister()
125 std::string Name = getInstructionOpcodeHash(*MRI.getVRegDef(VReg)); in createVirtualRegister()
126 return createVirtualRegisterWithLowerName(VReg, Name); in createVirtualRegister()
150 unsigned VRegRenamer::createVirtualRegisterWithLowerName(unsigned VReg, in createVirtualRegisterWithLowerName() argument
153 const TargetRegisterClass *RC = MRI.getRegClassOrNull(VReg); in createVirtualRegisterWithLowerName()
155 : MRI.createGenericVirtualRegister(MRI.getType(VReg), LowerName); in createVirtualRegisterWithLowerName()
DLiveRangeEdit.cpp35 Register VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in createEmptyIntervalFrom() local
37 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); in createEmptyIntervalFrom()
39 LiveInterval &LI = LIS.createEmptyInterval(VReg); in createEmptyIntervalFrom()
55 Register VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in createFrom() local
57 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); in createFrom()
66 LIS.getInterval(VReg).markNotSpillable(); in createFrom()
67 return VReg; in createFrom()
410 unsigned VReg = LI->reg; in eliminateDeadDefs() local
412 TheDelegate->LRE_WillShrinkVirtReg(VReg); in eliminateDeadDefs()
422 if (VReg == RegsBeingSpilled[i]) { in eliminateDeadDefs()
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DRegAllocPBQP.cpp169 void spillVReg(unsigned VReg, SmallVectorImpl<unsigned> &NewIntervals,
334 unsigned VReg = G.getNodeMetadata(NId).getVReg(); in apply() local
335 LiveInterval &LI = LIS.getInterval(VReg); in apply()
591 unsigned VReg = Worklist.back(); in initializeGraph() local
594 LiveInterval &VRegLI = LIS.getInterval(VReg); in initializeGraph()
604 const TargetRegisterClass *TRC = MRI.getRegClass(VReg); in initializeGraph()
641 spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller); in initializeGraph()
645 VRegAllowedMap[VReg] = std::move(VRegAllowed); in initializeGraph()
649 auto VReg = KV.first; in initializeGraph() local
652 if (LIS.getInterval(VReg).empty()) { in initializeGraph()
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DLiveIntervalUnion.cpp147 LiveInterval *VReg = LiveUnionI.value(); in collectInterferingVRegs() local
148 if (VReg != RecentReg && !isSeenInterference(VReg)) { in collectInterferingVRegs()
149 RecentReg = VReg; in collectInterferingVRegs()
150 InterferingVRegs.push_back(VReg); in collectInterferingVRegs()
DMachineRegisterInfo.cpp172 Register MachineRegisterInfo::cloneVirtualRegister(Register VReg, in cloneVirtualRegister() argument
175 VRegInfo[Reg].first = VRegInfo[VReg].first; in cloneVirtualRegister()
176 setType(Reg, getType(VReg)); in cloneVirtualRegister()
182 void MachineRegisterInfo::setType(unsigned VReg, LLT Ty) { in setType() argument
183 VRegToType.grow(VReg); in setType()
184 VRegToType[VReg] = Ty; in setType()
451 unsigned MachineRegisterInfo::getLiveInPhysReg(unsigned VReg) const { in getLiveInPhysReg()
453 if (I->second == VReg) in getLiveInPhysReg()
DMIRVRegNamerUtils.h70 unsigned createVirtualRegister(unsigned VReg);
73 unsigned createVirtualRegisterWithLowerName(unsigned VReg, StringRef Name);
DRegisterScavenging.cpp625 Register VReg, bool ReserveAfter) { in scavengeVReg() argument
632 for (MachineOperand &MO : MRI.reg_nodbg_operands(VReg)) { in scavengeVReg()
639 if (!MI.readsRegister(VReg, &TRI)) { in scavengeVReg()
656 std::find_if(MRI.def_begin(VReg), MRI.def_end(), in scavengeVReg()
657 [VReg, &TRI](const MachineOperand &MO) { in scavengeVReg()
658 return !MO.getParent()->readsRegister(VReg, &TRI); in scavengeVReg()
667 const TargetRegisterClass &RC = *MRI.getRegClass(VReg); in scavengeVReg()
670 MRI.replaceRegWith(VReg, SReg); in scavengeVReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineRegisterInfo.h217 bool shouldTrackSubRegLiveness(Register VReg) const { in shouldTrackSubRegLiveness() argument
218 assert(VReg.isVirtual() && "Must pass a VReg"); in shouldTrackSubRegLiveness()
219 return shouldTrackSubRegLiveness(*getRegClass(VReg)); in shouldTrackSubRegLiveness()
725 Register cloneVirtualRegister(Register VReg, StringRef Name = "");
736 void setType(unsigned VReg, LLT Ty);
762 void setRegAllocationHint(unsigned VReg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint() argument
763 assert(Register::isVirtualRegister(VReg)); in setRegAllocationHint()
764 RegAllocHints[VReg].first = Type; in setRegAllocationHint()
765 RegAllocHints[VReg].second.clear(); in setRegAllocationHint()
766 RegAllocHints[VReg].second.push_back(PrefReg); in setRegAllocationHint()
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DRegAllocPBQP.h146 void setNodeIdForVReg(unsigned VReg, GraphBase::NodeId NId) { in setNodeIdForVReg() argument
147 VRegToNodeId[VReg] = NId; in setNodeIdForVReg()
150 GraphBase::NodeId getNodeIdForVReg(unsigned VReg) const { in getNodeIdForVReg() argument
151 auto VRegItr = VRegToNodeId.find(VReg); in getNodeIdForVReg()
185 OptUnsafeEdges(new unsigned[NumOpts]), VReg(Other.VReg), in NodeMetadata()
200 void setVReg(unsigned VReg) { this->VReg = VReg; } in setVReg() argument
201 unsigned getVReg() const { return VReg; } in getVReg()
259 unsigned VReg = 0; variable
DScheduleDAGInstrs.h57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
58 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DUtils.cpp207 Optional<int64_t> llvm::getConstantVRegVal(unsigned VReg, in getConstantVRegVal() argument
210 getConstantVRegValWithLookThrough(VReg, MRI, /*LookThroughInstrs*/ false); in getConstantVRegVal()
211 assert((!ValAndVReg || ValAndVReg->VReg == VReg) && in getConstantVRegVal()
219 unsigned VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs, in getConstantVRegValWithLookThrough() argument
244 while ((MI = MRI.getVRegDef(VReg)) && !IsConstantOpcode(MI->getOpcode()) && in getConstantVRegValWithLookThrough()
253 VReg = MI->getOperand(1).getReg(); in getConstantVRegValWithLookThrough()
256 VReg = MI->getOperand(1).getReg(); in getConstantVRegValWithLookThrough()
257 if (Register::isPhysicalRegister(VReg)) in getConstantVRegValWithLookThrough()
261 VReg = MI->getOperand(1).getReg(); in getConstantVRegValWithLookThrough()
292 return ValueAndVReg{Val.getSExtValue(), VReg}; in getConstantVRegValWithLookThrough()
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DInstructionSelect.cpp190 unsigned VReg = Register::index2VirtReg(I); in runOnMachineFunction() local
193 if (!MRI.def_empty(VReg)) in runOnMachineFunction()
194 MI = &*MRI.def_instr_begin(VReg); in runOnMachineFunction()
195 else if (!MRI.use_empty(VReg)) in runOnMachineFunction()
196 MI = &*MRI.use_instr_begin(VReg); in runOnMachineFunction()
200 const TargetRegisterClass *RC = MRI.getRegClassOrNull(VReg); in runOnMachineFunction()
207 const LLT Ty = MRI.getType(VReg); in runOnMachineFunction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCMachineFunctionInfo.cpp46 bool PPCFunctionInfo::isLiveInSExt(unsigned VReg) const { in isLiveInSExt()
48 if (LiveIn.first == VReg) in isLiveInSExt()
53 bool PPCFunctionInfo::isLiveInZExt(unsigned VReg) const { in isLiveInZExt()
55 if (LiveIn.first == VReg) in isLiveInZExt()
DPPCMachineFunctionInfo.h203 void addLiveInAttr(unsigned VReg, ISD::ArgFlagsTy Flags) { in addLiveInAttr() argument
204 LiveInAttrs.push_back(std::make_pair(VReg, Flags)); in addLiveInAttr()
209 bool isLiveInSExt(unsigned VReg) const;
213 bool isLiveInZExt(unsigned VReg) const;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/MIRParser/
DMIRParser.cpp512 for (const auto &VReg : YamlMF.VirtualRegisters) { in parseRegisterInfo() local
513 VRegInfo &Info = PFS.getVRegInfo(VReg.ID.Value); in parseRegisterInfo()
515 return error(VReg.ID.SourceRange.Start, in parseRegisterInfo()
517 Twine(VReg.ID.Value) + "'"); in parseRegisterInfo()
520 if (StringRef(VReg.Class.Value).equals("_")) { in parseRegisterInfo()
524 const auto *RC = Target->getRegClass(VReg.Class.Value); in parseRegisterInfo()
529 const RegisterBank *RegBank = Target->getRegBank(VReg.Class.Value); in parseRegisterInfo()
532 VReg.Class.SourceRange.Start, in parseRegisterInfo()
534 VReg.Class.Value + "'"); in parseRegisterInfo()
540 if (!VReg.PreferredRegister.Value.empty()) { in parseRegisterInfo()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DUtils.h113 Optional<int64_t> getConstantVRegVal(unsigned VReg,
119 unsigned VReg; member
129 getConstantVRegValWithLookThrough(unsigned VReg, const MachineRegisterInfo &MRI,
132 const ConstantFP* getConstantFPVRegVal(unsigned VReg,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp275 Register VReg = MRI->createVirtualRegister(RC); in getVR() local
277 TII->get(TargetOpcode::IMPLICIT_DEF), VReg); in getVR()
278 return VReg; in getVR()
301 unsigned VReg = getVR(Op, VRBaseMap); in AddRegisterOperand() local
318 = MRI->constrainRegClass(VReg, OpRC, MinRCSize); in AddRegisterOperand()
324 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddRegisterOperand()
325 VReg = NewVReg; in AddRegisterOperand()
355 MIB.addReg(VReg, getDefRegState(isOptDef) | getKillRegState(isKill) | in AddRegisterOperand()
376 unsigned VReg = R->getReg(); in AddOperand() local
388 if (OpRC && IIRC && OpRC != IIRC && Register::isVirtualRegister(VReg)) { in AddOperand()
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DSDNodeDbgValue.h46 unsigned VReg; ///< Valid for registers. member
84 u.VReg = VRegOrFrameIdx; in SDDbgValue()
111 unsigned getVReg() const { assert (kind==VREG); return u.VReg; } in getVReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64RegisterBankInfo.cpp697 Register VReg = MI.getOperand(0).getReg(); in getInstrMapping() local
698 if (!VReg) in getInstrMapping()
700 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
749 Register VReg = MI.getOperand(Idx).getReg(); in getInstrMapping() local
750 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
751 if (getRegBank(VReg, MRI, TRI) == &AArch64::FPRRegBank || in getInstrMapping()
817 Register VReg = MI.getOperand(1).getReg(); in getInstrMapping() local
818 if (!VReg) in getInstrMapping()
824 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping()
826 const LLT SrcTy = MRI.getType(VReg); in getInstrMapping()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelDAGToDAG.cpp268 unsigned VReg = RI.createVirtualRegister(&AVR::PTRDISPREGSRegClass); in SelectInlineAsmMemoryOperand() local
271 CurDAG->getCopyToReg(CopyFromRegOp, dl, VReg, CopyFromRegOp); in SelectInlineAsmMemoryOperand()
274 CurDAG->getCopyFromReg(CopyToReg, dl, VReg, TL.getPointerTy(DL)); in SelectInlineAsmMemoryOperand()
297 unsigned VReg = RI.createVirtualRegister(&AVR::PTRDISPREGSRegClass); in SelectInlineAsmMemoryOperand() local
299 SDValue CopyToReg = CurDAG->getCopyToReg(Op, dl, VReg, Op); in SelectInlineAsmMemoryOperand()
301 CurDAG->getCopyFromReg(CopyToReg, dl, VReg, TL.getPointerTy(DL)); in SelectInlineAsmMemoryOperand()

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