| /third_party/ffmpeg/libavcodec/ |
| D | h264_mb.c | 545 #define XCHG(a, b, xchg) \ in xchg_mb_border() macro
560 XCHG(top_border_m1 + (8 << pixel_shift), in xchg_mb_border()
563 XCHG(top_border + (0 << pixel_shift), src_y + (1 << pixel_shift), xchg); in xchg_mb_border()
564 XCHG(top_border + (8 << pixel_shift), src_y + (9 << pixel_shift), 1); in xchg_mb_border()
566 XCHG(sl->top_borders[top_idx][sl->mb_x + 1], in xchg_mb_border()
572 XCHG(top_border_m1 + (24 << pixel_shift), src_cb - (7 << pixel_shift), 1); in xchg_mb_border()
573 XCHG(top_border_m1 + (40 << pixel_shift), src_cr - (7 << pixel_shift), 1); in xchg_mb_border()
575 XCHG(top_border + (16 << pixel_shift), src_cb + (1 << pixel_shift), xchg); in xchg_mb_border()
576 XCHG(top_border + (24 << pixel_shift), src_cb + (9 << pixel_shift), 1); in xchg_mb_border()
577 XCHG(top_border + (32 << pixel_shift), src_cr + (1 << pixel_shift), xchg); in xchg_mb_border()
[all …]
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| D | vp8.c | 1566 #define XCHG(a, b, xchg) \ in xchg_mb_border() macro
1574 XCHG(top_border_m1 + 8, src_y - 8, xchg); in xchg_mb_border()
1575 XCHG(top_border, src_y, xchg); in xchg_mb_border()
1576 XCHG(top_border + 8, src_y + 8, 1); in xchg_mb_border()
1578 XCHG(top_border + 32, src_y + 16, 1); in xchg_mb_border()
1583 XCHG(top_border_m1 + 16, src_cb - 8, xchg); in xchg_mb_border()
1584 XCHG(top_border_m1 + 24, src_cr - 8, xchg); in xchg_mb_border()
1585 XCHG(top_border + 16, src_cb, 1); in xchg_mb_border()
1586 XCHG(top_border + 24, src_cr, 1); in xchg_mb_border()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Instrumentation/ |
| D | HWAddressSanitizer.cpp | 535 } else if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(I)) { in isInterestingMemoryAccess() local
538 *TypeSize = DL.getTypeStoreSizeInBits(XCHG->getCompareOperand()->getType()); in isInterestingMemoryAccess()
540 PtrOperand = XCHG->getPointerOperand(); in isInterestingMemoryAccess()
568 if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(I)) in getPointerOperandIndex() local
569 return XCHG->getPointerOperandIndex(); in getPointerOperandIndex()
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| D | AddressSanitizer.cpp | 1376 } else if (AtomicCmpXchgInst *XCHG = dyn_cast<AtomicCmpXchgInst>(I)) { in isInterestingMemoryAccess() local
1379 *TypeSize = DL.getTypeStoreSizeInBits(XCHG->getCompareOperand()->getType()); in isInterestingMemoryAccess()
1381 PtrOperand = XCHG->getPointerOperand(); in isInterestingMemoryAccess()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ScheduleZnver2.td | 514 // XCHG.
520 def : InstRW<[Zn2WriteXCHG], (instregex "XCHG(8|16|32|64)rr", "XCHG(16|32|64)ar")>;
527 def : InstRW<[Zn2WriteXCHGrm, ReadAfterLd], (instregex "XCHG(8|16|32|64)rm")>;
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| D | X86ScheduleZnver1.td | 532 // XCHG.
538 def : InstRW<[ZnWriteXCHGrm, ReadAfterLd], (instregex "XCHG(8|16|32|64)rm")>;
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| D | X86ScheduleAtom.td | 583 "XCHG(8|16|32|64)rm",
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| D | X86ScheduleBtVer2.td | 456 // atomic XCHG operations. We need two writes because the instruction latency
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| D | X86SchedBroadwell.td | 1175 def: InstRW<[BWWriteResGroup99], (instregex "XCHG(8|16|32|64)rm")>;
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| D | X86SchedHaswell.td | 1307 def: InstRW<[HWWriteResGroup68], (instregex "XCHG(8|16|32|64)rm")>;
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| D | X86SchedSkylakeClient.td | 1357 def: InstRW<[SKLWriteResGroup143], (instregex "XCHG(8|16|32|64)rm")>;
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| D | X86SchedSkylakeServer.td | 1836 def: InstRW<[SKXWriteResGroup157], (instregex "XCHG(8|16|32|64)rm")>;
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| D | X86InstrInfo.td | 2044 defm XCHG : ATOMIC_SWAP<0x86, 0x87, "xchg", "atomic_swap">, NotMemoryFoldable;
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| /third_party/rust/crates/memchr/bench/data/sliceslice/ |
| D | i386-notutf8.txt | 635 XCHG
1956 Explicit operand: XCHG EAX, EBX
2395 XCHG (Exchange) swaps the contents of two operands. This instruction takes
2398 loaded. XCHG is especially useful for implementing semaphores or similar
2401 The XCHG instruction can swap two byte operands, two word operands, or two
2402 doubleword operands. The operands for the XCHG instruction may be two
2404 with a memory operand, XCHG automatically activates the LOCK signal. (Refer
3213 XCHG EDX,EAS ; Swap high/low order parts
3221 replacing the XCHG with a ROR by 16 to swap high and low order parts of
9851 � Exchange: XCHG.
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| D | i386.txt | 635 XCHG
1956 Explicit operand: XCHG EAX, EBX
2395 XCHG (Exchange) swaps the contents of two operands. This instruction takes
2398 loaded. XCHG is especially useful for implementing semaphores or similar
2401 The XCHG instruction can swap two byte operands, two word operands, or two
2402 doubleword operands. The operands for the XCHG instruction may be two
2404 with a memory operand, XCHG automatically activates the LOCK signal. (Refer
3213 XCHG EDX,EAS ; Swap high/low order parts
3221 replacing the XCHG with a ROR by 16 to swap high and low order parts of
9851 Exchange: XCHG.
[all …]
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| D | words.txt | 4557 XCHG
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| /third_party/mesa3d/docs/relnotes/ |
| D | 22.1.0.rst | 439 - pan/bi: Model Valhall-style A(CMP)XCHG
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