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Searched refs:addiu (Results 1 – 23 of 23) sorted by relevance

/third_party/libjpeg-turbo/simd/mips/
Djsimd_dspr2.S50 addiu t9, t9, -1
64 addiu t5, t5, 1
77 addiu t5, t5, 4
83 addiu t1, t1, 1
86 addiu a1, a1, 4
88 addiu a3, a3, 1
92 addiu t9, t9, -1
113 addiu t5, t5, 4
119 addiu t1, t1, 1
122 addiu a1, a1, 4
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Djsimd_dspr2_asm.h165 addiu sp, sp, -\stack_offset
290 addiu sp, sp, \stack_offset
/third_party/flutter/skia/third_party/externals/libjpeg-turbo/simd/mips/
Djsimd_dspr2.S50 addiu t9, t9, -1
64 addiu t5, t5, 1
77 addiu t5, t5, 4
83 addiu t1, t1, 1
86 addiu a1, a1, 4
88 addiu a3, a3, 1
92 addiu t9, t9, -1
113 addiu t5, t5, 4
119 addiu t1, t1, 1
122 addiu a1, a1, 4
[all …]
Djsimd_dspr2_asm.h165 addiu sp, sp, -\stack_offset
290 addiu sp, sp, \stack_offset
/third_party/musl/src/ldso/mipsn32/
Ddlsym.s7 addiu $3, $3, %lo(%neg(%gp_rel(dlsym)))
11 addiu $sp, $sp, -32
17 addiu $sp, $sp, 32
/third_party/musl/src/ldso/mips/
Ddlsym.s7 addiu $gp, %lo(_gp_disp)
11 addiu $sp, $sp, -16
17 addiu $sp, $sp, 16
/third_party/musl/src/unistd/mipsn32/
Dpipe.s6 addiu $3, $3, %lo(%neg(%gp_rel(pipe)))
/third_party/musl/src/unistd/mips/
Dpipe.s7 addiu $gp, %lo(_gp_disp)
/third_party/musl/src/signal/mips/
Dsigsetjmp.s10 addiu $gp, %lo(_gp_disp)
/third_party/musl/src/fenv/mips/
Dfenv.S64 addiu $5, $4, 1
/third_party/musl/src/fenv/mipsn32/
Dfenv.S63 addiu $5, $4, 1
/third_party/musl/src/signal/mipsn32/
Dsigsetjmp.s9 addiu $3, $3, %lo(%neg(%gp_rel(sigsetjmp)))
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceAssemblerMIPS32.h128 void addiu(const Operand *OpRt, const Operand *OpRs, const uint32_t Imm);
130 void addiu(const Operand *OpRt, const Operand *OpRs, const Operand *OpImm,
DIceInstMIPS32.cpp660 Asm->addiu(getDest(), getSrc(0), Imm); in emitIAS()
662 Asm->addiu(getDest(), getSrc(0), getSrc(1), Reloc); in emitIAS()
DIceAssemblerMIPS32.cpp395 void AssemblerMIPS32::addiu(const Operand *OpRt, const Operand *OpRs, in addiu() function in Ice::MIPS32::AssemblerMIPS32
401 void AssemblerMIPS32::addiu(const Operand *OpRt, const Operand *OpRs, in addiu() function in Ice::MIPS32::AssemblerMIPS32
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16InstrInfo.td529 def AddiuRxImmX16: FEXT_RI16_ins<0b01001, "addiu", IIM16Alu>;
531 def AddiuRxRxImm16: F2RI16_ins<0b01001, "addiu", IIM16Alu>,
535 def AddiuRxRxImmX16: FEXT_2RI16_ins<0b01001, "addiu", IIM16Alu>,
541 FEXT_RRI_A16_mem_ins<0, "addiu", mem16_ea, IIM16Alu>;
549 def AddiuRxPcImmX16: FEXT_RI16_PC_ins<0b00001, "addiu", IIM16Alu>;
557 : FI816_SP_ins<0b011, "addiu", IIM16Alu> {
564 : FEXT_I816_SP_ins<0b011, "addiu", IIM16Alu> {
DMipsInstrInfo.td1218 // e.g. addiu, sltiu
2003 // Expands to: addiu $dst, $src, %highest/%higher/%hi/%lo($tgt - $baltgt)
2008 // Expands to: addiu $dst, $src, %highest/%higher/%hi/%lo($tgt)
2023 def ADDiu : MMRel, StdMMR6Rel, ArithLogicI<"addiu", simm16_relaxed, GPR32Opnd,
2376 def LEA_ADDiu : MMRel, EffectiveAddress<"addiu", GPR32Opnd>, LW_FM<9>,
DMicroMipsInstrInfo.td722 def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd, II_ADDIU>,
741 def LEA_ADDiu_MM : MMRel, EffectiveAddress<"addiu", GPR32Opnd>,
DMipsScheduleP5600.td221 // add, addi, addiu, addu, andi, ori, rotr, se[bh], sllv?, sr[al]v?, slt, sltu,
DMicroMips32r6InstrInfo.td49 class ADDIU_MMR6_ENC : ADDI_FM_MMR6<"addiu", 0xc>;
345 : ArithLogicI<"addiu", simm16, GPR32Opnd, II_ADDIU, immSExt16, add>;
DMips64InstrInfo.td434 // Expands to: addiu $dst, %highest/%higher/%hi/%lo($tgt)
DMipsScheduleGeneric.td44 // add, addi, addiu, addu, and, andi, clo, clz, ext, ins, lui, nor, or, ori,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc5468 …{ 98 /* addiu */, Mips::AddiuSpImmX16, Convert__SImm161_1, AMFBS_InMips16Mode, { MCK_CPUSPReg, MCK…
5469 …{ 98 /* addiu */, Mips::AddiuRxImmX16, Convert__Reg1_0__SImm161_1, AMFBS_InMips16Mode, { MCK_CPU16…
5470 …{ 98 /* addiu */, Mips::ADDIU_MMR6, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__SImm161_1, AMFBS_InMi…
5471 …{ 98 /* addiu */, Mips::ADDiu_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__SImm161_1, AMFBS_InMicr…
5472 …{ 98 /* addiu */, Mips::ADDiu, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__SImm16_Relaxed1_1, AMFBS_H…
5473 …{ 98 /* addiu */, Mips::AddiuRxPcImmX16, Convert__Reg1_0__SImm161_2, AMFBS_InMips16Mode, { MCK_CPU…
5474 …{ 98 /* addiu */, Mips::AddiuRxRyOffMemX16, Convert__Reg1_0__Reg1_1__SImm161_2, AMFBS_InMips16Mode…
5475 …{ 98 /* addiu */, Mips::ADDIU_MMR6, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__SImm161_2, AMFBS_InMi…
5476 …{ 98 /* addiu */, Mips::ADDiu_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__SImm161_2, AMFBS_InMicr…
5477 …{ 98 /* addiu */, Mips::ADDiu, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__SImm16_Relaxed1_2, AMFBS_H…
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