Searched refs:alu_instr (Results 1 – 8 of 8) sorted by relevance
| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_lower_packing.c | 104 nir_alu_instr *alu_instr = (nir_alu_instr *) instr; in lower_pack_instr() local
106 if (alu_instr->op != nir_op_pack_64_2x32 && in lower_pack_instr()
107 alu_instr->op != nir_op_unpack_64_2x32 && in lower_pack_instr()
108 alu_instr->op != nir_op_pack_64_4x16 && in lower_pack_instr()
109 alu_instr->op != nir_op_unpack_64_4x16 && in lower_pack_instr()
110 alu_instr->op != nir_op_pack_32_2x16 && in lower_pack_instr()
111 alu_instr->op != nir_op_unpack_32_2x16 && in lower_pack_instr()
112 alu_instr->op != nir_op_pack_32_4x8) in lower_pack_instr()
115 b->cursor = nir_before_instr(&alu_instr->instr); in lower_pack_instr()
117 nir_ssa_def *src = nir_ssa_for_alu_src(b, alu_instr, 0); in lower_pack_instr()
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| D | nir_lower_frexp.c | 178 nir_alu_instr *alu_instr = nir_instr_as_alu(instr); in lower_frexp_impl() local
183 switch (alu_instr->op) { in lower_frexp_impl()
185 lower = lower_frexp_sig(&b, nir_ssa_for_alu_src(&b, alu_instr, 0)); in lower_frexp_impl()
188 lower = lower_frexp_exp(&b, nir_ssa_for_alu_src(&b, alu_instr, 0)); in lower_frexp_impl()
194 nir_ssa_def_rewrite_uses(&alu_instr->dest.dest.ssa, in lower_frexp_impl()
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| D | nir_opt_if.c | 898 nir_alu_instr *alu_instr = nir_instr_as_alu(src_instr); in opt_if_simplification() local
899 if (!nir_alu_instr_is_comparison(alu_instr)) in opt_if_simplification()
903 b->cursor = nir_after_instr(&alu_instr->instr); in opt_if_simplification()
906 nir_inot(b, &alu_instr->dest.dest.ssa); in opt_if_simplification()
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| D | nir.h | 4154 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_nir_lower_io_offsets.c | 86 check_and_propagate_bit_shift32(nir_builder *b, nir_alu_instr *alu_instr, in check_and_propagate_bit_shift32() argument
89 assert(alu_instr->src[1].src.is_ssa); in check_and_propagate_bit_shift32()
90 nir_ssa_def *shift_ssa = alu_instr->src[1].src.ssa; in check_and_propagate_bit_shift32()
95 nir_const_value *const_val = nir_src_as_const_value(alu_instr->src[1].src); in check_and_propagate_bit_shift32()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection_setup.cpp | 478 nir_alu_instr* alu_instr = nir_instr_as_alu(instr); in init_context() local
480 nir_dest_is_divergent(alu_instr->dest.dest) ? RegType::vgpr : RegType::sgpr; in init_context()
481 switch (alu_instr->op) { in init_context()
575 type = alu_instr->dest.dest.ssa.num_components == 2 ? RegType::vgpr : type; in init_context()
578 for (unsigned i = 0; i < nir_op_infos[alu_instr->op].num_inputs; i++) { in init_context()
579 if (regclasses[alu_instr->src[i].src.ssa->index].type() == RegType::vgpr) in init_context()
585 RegClass rc = get_reg_class(ctx, type, alu_instr->dest.dest.ssa.num_components, in init_context()
586 alu_instr->dest.dest.ssa.bit_size); in init_context()
587 regclasses[alu_instr->dest.dest.ssa.index] = rc; in init_context()
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| /third_party/mesa3d/src/freedreno/afuc/ |
| D | parser.y | 185 instr_r: alu_instr
186 | T_XMOV alu_instr { instr->xmov = $1; }
230 alu_instr: alu_2src_instr
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| /third_party/mesa3d/src/compiler/glsl/ |
| D | glsl_to_nir.cpp | 1790 nir_alu_instr *alu_instr; in get_instr_dest() local
1796 alu_instr = nir_instr_as_alu(instr); in get_instr_dest()
1797 return &alu_instr->dest.dest; in get_instr_dest()
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