Searched refs:as_linear (Results 1 – 7 of 7) sorted by relevance
/third_party/mesa3d/src/amd/compiler/tests/ |
D | test_regalloc.cpp | 198 Temp tmp = bld.pseudo(aco_opcode::p_unit_test, bld.def(v1.as_linear(), reg_v0)); 224 Temp tmp = bld.pseudo(aco_opcode::p_unit_test, bld.def(v1.as_linear(), reg_v1)); 252 Temp lin_tmp = bld.pseudo(aco_opcode::p_unit_test, bld.def(v1.as_linear(), reg_v4)); 277 Temp lin_tmp = bld.pseudo(aco_opcode::p_unit_test, bld.def(v1.as_linear(), reg_v0));
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D | test_to_hw_instr.cpp | 815 Definition(scc, s1), Definition(v0_lo, v1.as_linear()), 816 Operand(reg_s0, s1), Operand(v1_lo, v1.as_linear())); 828 RegClass v1_linear = v1.as_linear();
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/third_party/mesa3d/src/amd/compiler/ |
D | aco_reduce_assign.cpp | 60 Temp reduceTmp(0, RegClass(RegType::vgpr, maxSize).as_linear()); in setup_reduce_temp() 61 Temp vtmp(0, RegClass(RegType::vgpr, maxSize).as_linear()); in setup_reduce_temp()
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D | aco_ir.h | 354 constexpr RegClass as_linear() const { return RegClass((RC)(rc | (1 << 6))); } in as_linear() function 370 return get(RegType::vgpr, bytes).as_linear(); in resize()
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D | aco_spill.cpp | 1784 Temp linear_vgpr = ctx.program->allocateTmp(v1.as_linear()); in assign_spill_slots() 1825 Temp linear_vgpr = ctx.program->allocateTmp(v1.as_linear()); in assign_spill_slots()
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D | aco_lower_to_hw_instr.cpp | 2145 assert(instr->operands[0].regClass() == v1.as_linear()); in lower_to_hw_instr() 2158 assert(instr->operands[0].regClass() == v1.as_linear()); in lower_to_hw_instr()
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D | aco_instruction_selection.cpp | 8164 reduce->operands[1] = Operand(RegClass(RegType::vgpr, dst.size()).as_linear()); in emit_reduction_instr() 8165 reduce->operands[2] = Operand(v1.as_linear()); in emit_reduction_instr()
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