Searched refs:base_off (Results 1 – 4 of 4) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/opt/ |
| D | instrument_pass.h | 326 uint32_t stage_idx, uint32_t base_off,
344 uint32_t base_off, InstructionBuilder* builder);
348 void GenStageStreamWriteCode(uint32_t stage_idx, uint32_t base_off,
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| /third_party/skia/third_party/externals/spirv-tools/source/opt/ |
| D | instrument_pass.h | 326 uint32_t stage_idx, uint32_t base_off,
344 uint32_t base_off, InstructionBuilder* builder);
348 void GenStageStreamWriteCode(uint32_t stage_idx, uint32_t base_off,
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| /third_party/spirv-tools/source/opt/ |
| D | instrument_pass.h | 339 uint32_t stage_idx, uint32_t base_off,
357 uint32_t base_off, InstructionBuilder* builder);
361 void GenStageStreamWriteCode(uint32_t stage_idx, uint32_t base_off,
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_nir_lower_ngg.c | 2237 unsigned slot, unsigned base_off, in update_ms_output_info_slot() argument
2241 s->output_info[slot + base_off].components_mask |= components_mask & 0xF; in update_ms_output_info_slot()
2244 base_off++; in update_ms_output_info_slot()
2264 unsigned base_off = nir_src_as_uint(*base_offset_src); in update_ms_output_info() local
2265 update_ms_output_info_slot(s, io_sem.location, base_off, components_mask); in update_ms_output_info()
2268 for (unsigned base_off = 0; base_off < io_sem.num_slots; ++base_off) in update_ms_output_info() local
2269 update_ms_output_info_slot(s, io_sem.location, base_off, components_mask); in update_ms_output_info()
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