| /third_party/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_gmem.c | 61 struct pipe_surface **bufs, const uint32_t *bases, uint32_t bin_w, in emit_mrt() argument
67 if (bin_w) { in emit_mrt()
111 if (bin_w) { in emit_mrt()
112 stride = bin_w << fdl_cpp_shift(&rsc->layout); in emit_mrt()
130 if (bin_w || (i >= nr_bufs) || !bufs[i]) { in emit_mrt()
318 struct pipe_surface **bufs, uint32_t nr_bufs, uint32_t bin_w) in emit_mem2gmem_surf() argument
323 emit_mrt(ring, nr_bufs, bufs, bases, bin_w, false); in emit_mem2gmem_surf()
360 unsigned bin_w = tile->bin_w; in fd4_emit_tile_mem2gmem() local
366 x1 = ((float)tile->xoff + bin_w) / ((float)pfb->width); in fd4_emit_tile_mem2gmem()
419 OUT_RING(ring, A4XX_GRAS_CL_VPORT_XOFFSET_0((float)bin_w / 2.0f)); in fd4_emit_tile_mem2gmem()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_gmem.c | 60 struct pipe_surface **bufs, const uint32_t *bases, uint32_t bin_w, in emit_mrt() argument
76 if (bin_w) { in emit_mrt()
108 if (bin_w) { in emit_mrt()
109 stride = bin_w << fdl_cpp_shift(&rsc->layout); in emit_mrt()
128 if (bin_w || (i >= nr_bufs) || !bufs[i]) { in emit_mrt()
318 OUT_RING(ring, A3XX_VSC_BIN_SIZE_WIDTH(gmem->bin_w) | in emit_binning_workaround()
440 A3XX_RB_RENDER_CONTROL_BIN_WIDTH(batch->gmem_state->bin_w)); in fd3_emit_tile_gmem2mem()
505 struct pipe_surface **psurf, uint32_t bufs, uint32_t bin_w) in emit_mem2gmem_surf() argument
517 emit_mrt(ring, bufs, psurf, bases, bin_w, false); in emit_mem2gmem_surf()
534 OUT_RING(ring, A3XX_RB_DEPTH_PITCH(4 * batch->gmem_state->bin_w)); in emit_mem2gmem_surf()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/ |
| D | freedreno_gmem.c | 137 printf("GMEM LAYOUT: bin=%ux%u, nbins=%ux%u\n", gmem->bin_w, gmem->bin_h, in dump_gmem_state()
143 unsigned size = gmem->cbuf_cpp[i] * gmem->bin_w * gmem->bin_h; in dump_gmem_state()
154 unsigned size = gmem->zsbuf_cpp[i] * gmem->bin_w * gmem->bin_h; in dump_gmem_state()
181 uint32_t bin_w, bin_h; in layout_gmem() local
182 bin_w = div_align(key->width, nbins_x, screen->info->tile_align_w); in layout_gmem()
185 if (bin_w > screen->info->tile_max_w) in layout_gmem()
191 gmem->bin_w = bin_w; in layout_gmem()
197 gmem->nbins_x = DIV_ROUND_UP(key->width, bin_w); in layout_gmem()
203 total = gmem->cbuf_base[i] + key->cbuf_cpp[i] * bin_w * bin_h; in layout_gmem()
209 total = gmem->zsbuf_base[0] + key->zsbuf_cpp[0] * bin_w * bin_h; in layout_gmem()
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| D | freedreno_gmem.h | 44 uint16_t bin_w, bin_h; member
58 uint16_t bin_w, nbins_x; member
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| D | trace-parser.py | 84 def __init__(self, nbins_x, nbins_y, bin_w, bin_h): argument
87 self.bin_w = bin_w
221 bin_w=match.group(3),
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| D | gmemtool.c | 182 assert((gmem->bin_w * gmem->nbins_x) >= key.width); in main()
184 assert(gmem->bin_w < screen.info->tile_max_w); in main()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_gmem.c | 197 OUT_RING(ring, fui((float)gmem->bin_w / 2.0f)); /* XSCALE */ in prepare_tile_fini_ib()
198 OUT_RING(ring, fui((float)gmem->bin_w / 2.0f)); /* XOFFSET */ in prepare_tile_fini_ib()
288 unsigned bin_w = tile->bin_w; in fd2_emit_tile_mem2gmem() local
302 x1 = ((float)tile->xoff + bin_w) / ((float)pfb->width); in fd2_emit_tile_mem2gmem()
358 OUT_RING(ring, xy2d(bin_w, bin_h)); /* PA_SC_WINDOW_SCISSOR_BR */ in fd2_emit_tile_mem2gmem()
362 OUT_RING(ring, fui((float)bin_w / 2.0f)); /* PA_CL_VPORT_XSCALE */ in fd2_emit_tile_mem2gmem()
363 OUT_RING(ring, fui((float)bin_w / 2.0f)); /* PA_CL_VPORT_XOFFSET */ in fd2_emit_tile_mem2gmem()
501 OUT_RING(ring, gmem->bin_w); /* RB_SURFACE_INFO */ in fd2_emit_tile_init()
527 size = align(gmem->bin_w * gmem->bin_h * color_size, 0x8000); in fd2_emit_tile_init()
532 size = align(gmem->bin_w * gmem->bin_h * depth_size, 0x8000); in fd2_emit_tile_init()
[all …]
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_gmem.c | 86 stride = gmem->bin_w * gmem->cbuf_cpp[i]; in emit_mrt()
145 stride = cpp * gmem->bin_w; in emit_zs()
193 stride = 1 * gmem->bin_w; in emit_zs()
305 OUT_RING(ring, A5XX_VSC_BIN_SIZE_WIDTH(gmem->bin_w) | in update_vsc_pipe()
354 A5XX_RB_CNTL_WIDTH(gmem->bin_w) | A5XX_RB_CNTL_HEIGHT(gmem->bin_h)); in emit_binning_pass()
464 uint32_t x2 = tile->xoff + tile->bin_w - 1; in fd5_emit_tile_prep()
542 stride = gmem->bin_w << fdl_cpp_shift(&rsc->layout); in emit_mem2gmem_surf()
579 OUT_RING(ring, A5XX_RB_CNTL_WIDTH(gmem->bin_w) | in fd5_emit_tile_mem2gmem()
615 A5XX_RB_CNTL_WIDTH(gmem->bin_w) | A5XX_RB_CNTL_HEIGHT(gmem->bin_h)); in fd5_emit_tile_renderprep()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_gmem.c | 288 patch->cs[2] = A6XX_TEX_CONST_2_PITCH(gmem->bin_w * gmem->cbuf_cpp[0]) | in patch_fb_read_gmem()
441 ring, A6XX_VSC_BIN_SIZE(.width = gmem->bin_w, .height = gmem->bin_h), in update_vsc_pipe()
843 set_bin_size(ring, gmem->bin_w, gmem->bin_h, in fd6_emit_tile_init()
859 set_bin_size(ring, gmem->bin_w, gmem->bin_h, in fd6_emit_tile_init()
878 set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000); in fd6_emit_tile_init()
919 uint32_t x2 = tile->xoff + tile->bin_w - 1; in fd6_emit_tile_prep()
949 set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000); in fd6_emit_tile_prep()
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| D | fd6_blitter.c | 835 uint32_t gmem_pitch = gmem->bin_w * batch->framebuffer.samples * in fd6_resolve_tile()
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| D | tu_cmd_buffer.c | 327 uint32_t bin_w, uint32_t bin_h, uint32_t flags) in tu6_emit_bin_size() argument
330 A6XX_GRAS_BIN_CONTROL(.binw = bin_w, in tu6_emit_bin_size()
335 A6XX_RB_BIN_CONTROL(.binw = bin_w, in tu6_emit_bin_size()
341 A6XX_RB_BIN_CONTROL2(.binw = bin_w, in tu6_emit_bin_size()
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