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Searched refs:block_pool (Results 1 – 12 of 12) sorted by relevance

/third_party/mesa3d/src/intel/vulkan/
Danv_batch_chain.c565 .bo = pool->block_pool.bo, in anv_cmd_buffer_surface_base_address()
1402 assert(last_pool_center_bo_offset <= pool->block_pool.center_bo_offset); in adjust_relocations_from_state_pool()
1403 uint32_t delta = pool->block_pool.center_bo_offset - last_pool_center_bo_offset; in adjust_relocations_from_state_pool()
1422 assert(last_pool_center_bo_offset <= pool->block_pool.center_bo_offset); in adjust_relocations_to_state_pool()
1423 uint32_t delta = pool->block_pool.center_bo_offset - last_pool_center_bo_offset; in adjust_relocations_to_state_pool()
1432 if (relocs->reloc_bos[i] == pool->block_pool.bo) { in adjust_relocations_to_state_pool()
1446 write_reloc(pool->block_pool.device, in adjust_relocations_to_state_pool()
1549 anv_bo_unwrap(cmd_buffer->device->surface_state_pool.block_pool.bo); in relocate_cmd_buffer()
1695 ss_pool->block_pool.bo, in setup_execbuf_for_cmd_buffer()
1724 cmd_buffer->last_ss_pool_center = ss_pool->block_pool.center_bo_offset; in setup_execbuf_for_cmd_buffer()
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DgenX_blorp_exec.c106 &cmd_buffer->device->surface_state_pool.block_pool, ss_offset, 8); in blorp_surface_reloc()
132 .buffer = cmd_buffer->device->surface_state_pool.block_pool.bo, in blorp_get_surface_base_address()
214 .buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo, in blorp_alloc_vertex_buffer()
Danv_allocator.c851 VkResult result = anv_block_pool_init(&pool->block_pool, device, name, in anv_state_pool_init()
861 anv_block_pool_finish(&pool->block_pool); in anv_state_pool_init()
883 anv_block_pool_finish(&pool->block_pool); in anv_state_pool_finish()
888 struct anv_block_pool *block_pool, in anv_fixed_size_state_pool_alloc_new() argument
907 return anv_block_pool_alloc(block_pool, state_size, padding); in anv_fixed_size_state_pool_alloc_new()
915 offset = anv_block_pool_alloc(block_pool, block_size, padding); in anv_fixed_size_state_pool_alloc_new()
970 state_i->map = anv_block_pool_map(&pool->block_pool, in anv_state_pool_return_blocks()
1101 &pool->block_pool, in anv_state_pool_alloc_no_vg()
1113 state->map = anv_block_pool_map(&pool->block_pool, offset, alloc_size); in anv_state_pool_alloc_no_vg()
1151 offset = anv_block_pool_alloc_back(&pool->block_pool, in anv_state_pool_alloc_back()
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DgenX_cmd_buffer.c162 (struct anv_address) { device->dynamic_state_pool.block_pool.bo, 0 }; in genX()
171 (struct anv_address) { device->instruction_state_pool.block_pool.bo, 0 }; in genX()
216 (struct anv_address) { device->surface_state_pool.block_pool.bo, 0 }; in genX()
1116 .bo = cmd_buffer->device->surface_state_pool.block_pool.bo, in genX()
1892 primary->device->surface_state_pool.block_pool.bo; in genX()
2622 .bo = cmd_buffer->device->instruction_state_pool.block_pool.bo, in emit_binding_table()
3035 .bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo, in get_push_range_address()
3042 .bo = cmd_buffer->device->instruction_state_pool.block_pool.bo, in get_push_range_address()
3242 cmd_buffer->device->dynamic_state_pool.block_pool.bo); in cmd_buffer_emit_push_constant()
4126 .bo = cmd_buffer->device->dynamic_state_pool.block_pool.bo, in emit_base_vertex_instance()
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Danv_cmd_buffer.c365 .bo = device->dynamic_state_pool.block_pool.bo, in anv_cmd_buffer_set_ray_query_buffer()
901 .bo = cmd_buffer->dynamic_state_stream.state_pool->block_pool.bo, in anv_cmd_buffer_push_descriptor_set()
Danv_device.c2999 if (get_bo_from_pool(&ret_bo, &device->dynamic_state_pool.block_pool, address)) in decode_get_bo()
3001 if (get_bo_from_pool(&ret_bo, &device->instruction_state_pool.block_pool, address)) in decode_get_bo()
3003 if (get_bo_from_pool(&ret_bo, &device->binding_table_pool.block_pool, address)) in decode_get_bo()
3005 if (get_bo_from_pool(&ret_bo, &device->surface_state_pool.block_pool, address)) in decode_get_bo()
3048 buf->base.gpu = pool->block_pool.bo->offset + buf->state.offset; in intel_aux_map_buffer_alloc()
Danv_blorp.c882 .buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo, in anv_CmdUpdateBuffer()
Danv_private.h777 struct anv_block_pool block_pool; member
/third_party/mesa3d/src/intel/vulkan/tests/
Dstate_pool_padding.c42 struct anv_block_pool *bp = &state_pool.block_pool; in main()
/third_party/mesa3d/docs/relnotes/
D19.0.0.rst2043 - anv: Update usage of block_pool->bo.
D19.3.0.rst2775 - anv/block_pool: Align anv_block_pool state to 64 bits.
D20.0.0.rst1749 - anv/block_pool: Ensure allocations have contiguous maps