/third_party/mesa3d/src/imagination/vulkan/pds/ |
D | pvr_pds.h | 1001 uint8_t const_offset; member 1006 uint8_t const_offset; member 1013 uint8_t const_offset; member 1020 uint8_t const_offset; member 1029 uint8_t const_offset; member 1040 uint8_t const_offset; member 1049 uint8_t const_offset; member 1057 uint8_t const_offset; member 1064 uint8_t const_offset; member 1074 uint8_t const_offset; member [all …]
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D | pvr_xgl_pds.c | 142 robust_attribute_entry->const_offset = const_val; in pvr_write_pds_const_map_entry_vertex_attribute_address() 159 attribute_entry->const_offset = const_val; in pvr_write_pds_const_map_entry_vertex_attribute_address() 207 literal_entry->const_offset = const32; in pvr_encode_burst() 258 literal_entry->const_offset = const32; in pvr_encode_direct_write() 583 psBaseVertexEntry->const_offset = base_vertex; in pvr_pds_generate_vertex_primary_program() 604 literal_entry->const_offset = draw_index; in pvr_pds_generate_vertex_primary_program() 643 base_instance_entry->const_offset = base_instance; in pvr_pds_generate_vertex_primary_program() 658 base_instance_entry->const_offset = base_instance; in pvr_pds_generate_vertex_primary_program() 863 literal_entry->const_offset = multipier_constant; in pvr_pds_generate_vertex_primary_program() 1016 literal_entry->const_offset = const_base + 3; in pvr_pds_generate_vertex_primary_program() [all …]
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/third_party/mesa3d/src/freedreno/ir3/ |
D | ir3_nir_analyze_ubo_ranges.c | 297 int const_offset = 0; in lower_ubo_load_to_uniform() local 299 handle_partial_const(b, &ubo_offset, &const_offset); in lower_ubo_load_to_uniform() 317 assert(!(const_offset & 0x3)); in lower_ubo_load_to_uniform() 318 const_offset >>= 2; in lower_ubo_load_to_uniform() 321 const_offset += range_offset; in lower_ubo_load_to_uniform() 329 if (const_offset < 0) { in lower_ubo_load_to_uniform() 330 uniform_offset = nir_iadd_imm(b, uniform_offset, const_offset); in lower_ubo_load_to_uniform() 331 const_offset = 0; in lower_ubo_load_to_uniform() 336 uniform_offset, .base = const_offset); in lower_ubo_load_to_uniform()
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/third_party/mesa3d/src/compiler/nir/ |
D | nir_opt_offsets.c | 162 unsigned const_offset = nir_src_as_uint(*off_src); in try_fold_shared2() local 163 offset0 += const_offset; in try_fold_shared2() 164 offset1 += const_offset; in try_fold_shared2() 167 if (const_offset % stride || offset0 > 255 * stride || offset1 > 255 * stride) in try_fold_shared2()
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/third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
D | sfn_instr_mem.cpp | 662 auto const_offset = nir_src_as_const_value(intr->src[0]); in emit_ssbo_size() local 664 if (const_offset) in emit_ssbo_size() 665 res_id += const_offset[0].u32; in emit_ssbo_size() 796 auto const_offset = nir_src_as_const_value(intrin->src[0]); in emit_image_size() local 800 if (const_offset) in emit_image_size() 801 res_id += const_offset[0].u32; in emit_image_size() 821 if (const_offset) { in emit_image_size() 822 unsigned lookup_resid = const_offset[0].u32; in emit_image_size()
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/third_party/mesa3d/src/broadcom/compiler/ |
D | nir_to_vir.c | 356 uint32_t *const_offset, in emit_tmu_general_store_writes() argument 388 *const_offset = in emit_tmu_general_store_writes() 450 uint32_t const_offset, in emit_tmu_general_address_write() argument 474 if (const_offset != 0) { in emit_tmu_general_address_write() 476 vir_uniform_ui(c, const_offset)); in emit_tmu_general_address_write() 481 if (const_offset != 0) { in emit_tmu_general_address_write() 483 vir_uniform_ui(c, const_offset)); in emit_tmu_general_address_write() 556 uint32_t const_offset = 0; in ntq_emit_tmu_general() local 558 const_offset = nir_src_as_uint(instr->src[offset_src]); in ntq_emit_tmu_general() 562 const_offset += nir_intrinsic_base(instr); in ntq_emit_tmu_general() [all …]
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/third_party/mesa3d/src/gallium/drivers/zink/nir_to_spirv/ |
D | spirv_builder.c | 788 SpvId const_offset, in spirv_builder_emit_image_sample() argument 835 assert(!(const_offset && offset)); in spirv_builder_emit_image_sample() 836 if (const_offset) { in spirv_builder_emit_image_sample() 837 extra_operands[num_extra_operands++] = const_offset; in spirv_builder_emit_image_sample() 979 SpvId const_offset, in spirv_builder_emit_image_gather() argument 998 assert(!(const_offset && offset)); in spirv_builder_emit_image_gather() 999 if (const_offset) { in spirv_builder_emit_image_gather() 1000 extra_operands[num_extra_operands++] = const_offset; in spirv_builder_emit_image_gather() 1036 SpvId const_offset, in spirv_builder_emit_image_fetch() argument 1053 assert(!(const_offset && offset)); in spirv_builder_emit_image_fetch() [all …]
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D | spirv_builder.h | 285 SpvId const_offset, 327 SpvId const_offset, 338 SpvId const_offset,
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D | nir_to_spirv.c | 3363 const_offset = 0, offset = 0, sample = 0, tex_offset = 0, bindless = 0, min_lod = 0; in emit_tex() local 3398 const_offset = spirv_builder_const_composite(&ctx->builder, in emit_tex() 3403 const_offset = components[0]; in emit_tex() 3611 if (const_offset) in emit_tex() 3615 … lod, sample, const_offset, offset, dref, tex->is_sparse); in emit_tex() 3619 … image, coord, lod, sample, const_offset, offset, tex->is_sparse); in emit_tex() 3628 const_offset, offset, min_lod, tex->is_sparse); in emit_tex()
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/third_party/mesa3d/src/intel/compiler/ |
D | brw_nir_lower_mem_access_bit_sizes.c | 184 const unsigned const_offset = in lower_mem_store_bit_size() local 211 (offset_is_const && (start + const_offset) % 4 == 0); in lower_mem_store_bit_size()
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D | brw_fs.h | 119 uint32_t const_offset,
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D | brw_fs_nir.cpp | 3743 nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); in nir_emit_fs_intrinsic() local 3745 if (const_offset) { in nir_emit_fs_intrinsic() 3747 unsigned off_x = const_offset[0].u32 & 0xf; in nir_emit_fs_intrinsic() 3748 unsigned off_y = const_offset[1].u32 & 0xf; in nir_emit_fs_intrinsic()
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D | brw_fs.cpp | 170 uint32_t const_offset, in VARYING_PULL_CONSTANT_LOAD() argument 185 bld.ADD(vec4_offset, varying_offset, brw_imm_ud(const_offset & ~0xf)); in VARYING_PULL_CONSTANT_LOAD() 200 (const_offset & 0xf) / type_sz(dst.type), 1); in VARYING_PULL_CONSTANT_LOAD()
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/third_party/mesa3d/src/amd/compiler/ |
D | aco_instruction_selection.cpp | 3685 nir_const_value* const_offset = nir_src_as_const_value(instr->src[1].src); in visit_alu_instr() local 3687 if (const_offset && const_bits) { in visit_alu_instr() 3688 uint32_t extract = (const_bits->u32 << 16) | (const_offset->u32 & 0x1f); in visit_alu_instr() 3706 Operand offset_op = const_offset in visit_alu_instr() 3707 ? Operand::c32(const_offset->u32 & 0x1fu) in visit_alu_instr() 3990 unsigned const_offset = 0; member 4003 unsigned bytes_needed, unsigned align, unsigned const_offset, 4022 unsigned const_offset = info.const_offset; in emit_load() local 4025 unsigned align_offset = (info.align_offset + const_offset) % align_mul; in emit_load() 4062 unsigned reduced_const_offset = const_offset; in emit_load() [all …]
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D | aco_statistics.cpp | 237 bool const_offset = in get_wait_counter_info() local 240 if (likely_desc_load || const_offset) in get_wait_counter_info()
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/third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
D | ir2_nir.c | 599 ASSERTED nir_const_value *const_offset; in emit_intrinsic() local 611 const_offset = nir_src_as_const_value(intr->src[0]); in emit_intrinsic() 612 assert(const_offset); /* TODO can be false in ES2? */ in emit_intrinsic() 614 idx += (uint32_t)const_offset[0].f32; in emit_intrinsic()
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/third_party/rust/crates/memoffset/src/ |
D | offset_of.rs | 317 fn const_offset() { in const_offset() function
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/third_party/mesa3d/src/imagination/vulkan/ |
D | pvr_cmd_buffer.c | 2636 literal->const_offset, in pvr_setup_vertex_buffers() 2655 doutu_addr->const_offset, in pvr_setup_vertex_buffers() 2668 base_instance->const_offset, in pvr_setup_vertex_buffers() 2687 attribute->const_offset, in pvr_setup_vertex_buffers() 2775 literal->const_offset, in pvr_setup_descriptor_mappings() 2811 const_buffer_entry->const_offset, in pvr_setup_descriptor_mappings() 2849 desc_set_entry->const_offset, in pvr_setup_descriptor_mappings() 2854 desc_set_entry->const_offset, in pvr_setup_descriptor_mappings() 2888 desc_set_entry->const_offset, in pvr_setup_descriptor_mappings() 2905 special_buff_entry->const_offset, in pvr_setup_descriptor_mappings()
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/third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
D | lp_bld_nir.c | 1333 uint32_t const_offset = 0; in get_deref_offset() local 1338 const_offset = nir_src_as_uint(instr->arr.index); in get_deref_offset() 1349 const_offset += glsl_count_attribute_slots(ft, vs_in); in get_deref_offset() 1354 const_offset += nir_src_comp_as_int(path.path[idx_lvl]->arr.index, 0) * size; in get_deref_offset() 1372 if (const_offset && offset) in get_deref_offset() 1374 … lp_build_const_int_vec(bld_base->base.gallivm, bld_base->uint_bld.type, const_offset), in get_deref_offset() 1376 *const_out = const_offset; in get_deref_offset()
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/third_party/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_descriptors.c | 1198 const uint8_t *ptr, unsigned size, uint32_t *const_offset) in si_upload_const_buffer() argument 1203 const_offset, (struct pipe_resource **)buf, &tmp); in si_upload_const_buffer()
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/third_party/mesa3d/src/amd/llvm/ |
D | ac_nir_to_llvm.c | 4193 unsigned const_offset = nir_intrinsic_base(instr); in visit_intrinsic() local 4219 LLVMConstInt(ctx->ac.i32, const_offset, 0), ""); in visit_intrinsic() 4230 unsigned const_offset = nir_intrinsic_base(instr); in visit_intrinsic() local 4247 LLVMConstInt(ctx->ac.i32, const_offset + start * 4, 0), ""); in visit_intrinsic()
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/third_party/mesa3d/src/microsoft/compiler/ |
D | nir_to_dxil.c | 3093 nir_const_value *const_offset = nir_src_as_const_value(intr->src[1]); in emit_load_ubo() local 3094 if (const_offset) { in emit_load_ubo() 3095 offset = dxil_module_get_int32_const(&ctx->mod, const_offset->i32 >> 4); in emit_load_ubo()
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/third_party/mesa3d/src/panfrost/bifrost/ |
D | bifrost_compile.c | 1093 uint32_t const_offset = offset_is_const ? nir_src_as_uint(*offset) : 0; in bi_emit_load_ubo() local 1098 bi_imm_u32(const_offset) : dyn_offset, in bi_emit_load_ubo()
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/third_party/mesa3d/docs/relnotes/ |
D | 19.1.0.rst | 2742 - iris: have more than one const_offset
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D | 20.2.0.rst | 4005 - freedreno/ir3: don't allow negative const_offset
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