Searched refs:count_va (Results 1 – 2 of 2) sorted by relevance
6683 uint32_t draw_count, uint64_t count_va, uint32_t stride) in radv_cs_emit_indirect_draw_packet() argument6706 if (draw_count == 1 && !count_va && !draw_id_enable) { in radv_cs_emit_indirect_draw_packet()6720 S_2C3_COUNT_INDIRECT_ENABLE(!!count_va)); in radv_cs_emit_indirect_draw_packet()6722 radeon_emit(cs, count_va); /* count_addr */ in radv_cs_emit_indirect_draw_packet()6723 radeon_emit(cs, count_va >> 32); in radv_cs_emit_indirect_draw_packet()6761 uint64_t count_va, uint32_t stride) in radv_cs_emit_dispatch_taskmesh_indirect_multi_ace_packet() argument6764 assert((count_va & 0x03) == 0); in radv_cs_emit_dispatch_taskmesh_indirect_multi_ace_packet()6770 const uint32_t count_indirect_enable = !!count_va; in radv_cs_emit_dispatch_taskmesh_indirect_multi_ace_packet()6806 radeon_emit(cs, count_va); in radv_cs_emit_dispatch_taskmesh_indirect_multi_ace_packet()6807 radeon_emit(cs, count_va >> 32); in radv_cs_emit_dispatch_taskmesh_indirect_multi_ace_packet()[all …]
1589 uint64_t count_va = 0; in si_emit_draw_packets() local1597 count_va = params_buf->gpu_address + indirect->indirect_draw_count_offset; in si_emit_draw_packets()1609 radeon_emit(count_va); in si_emit_draw_packets()1610 radeon_emit(count_va >> 32); in si_emit_draw_packets()