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Searched refs:def_instr_begin (Results 1 – 8 of 8) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64AdvSIMDScalarPass.cpp210 MRI->def_instr_begin(OrigSrc0); in isProfitableToTransform()
223 MRI->def_instr_begin(OrigSrc1); in isProfitableToTransform()
303 MRI->def_instr_begin(OrigSrc0); in transformInstruction()
322 MRI->def_instr_begin(OrigSrc1); in transformInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DLiveRangeShrink.cpp199 MachineInstr &DefInstr = *MRI.def_instr_begin(Reg); in runOnMachineFunction()
DMachineRegisterInfo.cpp402 def_instr_iterator I = def_instr_begin(Reg); in getVRegDef()
413 def_instr_iterator I = def_instr_begin(Reg); in getUniqueVRegDef()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DInstructionSelect.cpp194 MI = &*MRI.def_instr_begin(VReg); in runOnMachineFunction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineRegisterInfo.h397 def_instr_iterator def_instr_begin(unsigned RegNo) const { in def_instr_begin() function
406 return make_range(def_instr_begin(Reg), def_instr_end()); in def_instructions()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600OptimizeVectorRegisters.cpp355 It = MRI->def_instr_begin(Reg), E = MRI->def_instr_end(); in runOnMachineFunction()
DSIMachineScheduler.cpp313 UI = MRI->def_instr_begin(Reg), in isDefBetween()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.cpp471 for (MachineRegisterInfo::def_instr_iterator I = MRI.def_instr_begin(BaseReg), in regIsPICBase()