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Searched refs:fsr (Results 1 – 19 of 19) sorted by relevance

/third_party/vk-gl-cts/external/vulkancts/modules_no_buildgn/vulkan/fragment_shading_rate/
DvktFragmentShadingRateTests.cpp286 for (const auto& fsr : fragmentShadingRateVect) in testShadingRates() local
288 const auto& fragmentSize = fsr.fragmentSize; in testShadingRates()
309 if (fsr.sampleCounts != ~0u) in testShadingRates()
321 if (fsr.sampleCounts & highestSampleCount) in testShadingRates()
390 …(!(fsr.sampleCounts & vk::VK_SAMPLE_COUNT_1_BIT) || !(fsr.sampleCounts & vk::VK_SAMPLE_COUNT_4_BIT… in testShadingRates()
400 !(fsr.sampleCounts & vk::VK_SAMPLE_COUNT_2_BIT)) in testShadingRates()
/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/fragment_shading_rate/
DvktFragmentShadingRateTests.cpp286 for (const auto& fsr : fragmentShadingRateVect) in testShadingRates() local
288 const auto& fragmentSize = fsr.fragmentSize; in testShadingRates()
309 if (fsr.sampleCounts != ~0u) in testShadingRates()
321 if (fsr.sampleCounts & highestSampleCount) in testShadingRates()
390 …(!(fsr.sampleCounts & vk::VK_SAMPLE_COUNT_1_BIT) || !(fsr.sampleCounts & vk::VK_SAMPLE_COUNT_4_BIT… in testShadingRates()
400 !(fsr.sampleCounts & vk::VK_SAMPLE_COUNT_2_BIT)) in testShadingRates()
/third_party/mesa3d/src/intel/vulkan/
DgenX_state.c558 const struct vk_fragment_shading_rate_state *fsr) in get_cps_state_offset() argument
573 fsr->combiner_ops[0] * 5 * 3 * 3 + in get_cps_state_offset()
574 fsr->combiner_ops[1] * 3 * 3 + in get_cps_state_offset()
575 size_index[fsr->fragment_size.width] * 3 + in get_cps_state_offset()
576 size_index[fsr->fragment_size.height]; in get_cps_state_offset()
580 size_index[fsr->fragment_size.width] * 3 + in get_cps_state_offset()
581 size_index[fsr->fragment_size.height]; in get_cps_state_offset()
836 const struct vk_fragment_shading_rate_state *fsr) in genX()
845 cps.MinCPSizeX = fsr->fragment_size.width; in genX()
846 cps.MinCPSizeY = fsr->fragment_size.height; in genX()
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Danv_genX.h143 const struct vk_fragment_shading_rate_state *fsr);
Danv_pipeline.c366 const struct vk_fragment_shading_rate_state *fsr) in pipeline_has_coarse_pixel() argument
405 fsr->fragment_size.width <= 1 && in pipeline_has_coarse_pixel()
406 fsr->fragment_size.height <= 1 && in pipeline_has_coarse_pixel()
407 fsr->combiner_ops[0] == VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR && in pipeline_has_coarse_pixel()
408 fsr->combiner_ops[1] == VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR) in pipeline_has_coarse_pixel()
439 const struct vk_fragment_shading_rate_state *fsr, in populate_wm_prog_key() argument
491 pipeline_has_coarse_pixel(pipeline, dynamic, ms, fsr); in populate_wm_prog_key()
1353 state->dynamic, state->ms, state->fsr, state->rp, in anv_graphics_pipeline_init_keys()
Dgfx8_cmd_buffer.c325 genX(emit_shading_rate)(&cmd_buffer->batch, pipeline, &dyn->fsr); in genX()
/third_party/openssl/crypto/poly1305/asm/
Dpoly1305-sparcv9.pl485 stx %fsr,[%sp+LOCALS] ! save original %fsr
486 ldx [%o7+8*6],%fsr ! load new %fsr
581 ldx [%sp+LOCALS],%fsr ! restore %fsr
688 stx %fsr,[%sp+LOCALS+8*4] ! save original %fsr
689 ldx [%o7+8*6],%fsr ! load new %fsr
905 ldx [%sp+LOCALS+8*4],%fsr ! restore saved %fsr
/third_party/mesa3d/src/vulkan/runtime/
Dvk_graphics_state.c541 struct vk_fragment_shading_rate_state *fsr, in vk_fragment_shading_rate_state_init() argument
546 fsr->fragment_size = fsr_info->fragmentSize; in vk_fragment_shading_rate_state_init()
547 fsr->combiner_ops[0] = fsr_info->combinerOps[0]; in vk_fragment_shading_rate_state_init()
548 fsr->combiner_ops[1] = fsr_info->combinerOps[1]; in vk_fragment_shading_rate_state_init()
550 fsr->fragment_size = (VkExtent2D) { 1, 1 }; in vk_fragment_shading_rate_state_init()
551 fsr->combiner_ops[0] = VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR; in vk_fragment_shading_rate_state_init()
552 fsr->combiner_ops[1] = VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR; in vk_fragment_shading_rate_state_init()
560 const struct vk_fragment_shading_rate_state *fsr) in vk_dynamic_graphics_state_init_fsr() argument
562 dst->fsr = *fsr; in vk_dynamic_graphics_state_init_fsr()
988 vk_fragment_shading_rate_state, fsr); \
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Dvk_graphics_state.h641 struct vk_fragment_shading_rate_state fsr; member
694 struct vk_fragment_shading_rate_state fsr; member
727 const struct vk_fragment_shading_rate_state *fsr; member
/third_party/musl/arch/microblaze/bits/
Duser.h6 unsigned grp[32], pc, msr, ear, esr, fsr, btr, pvr[12]; member
Dsignal.h17 unsigned long pc, msr, ear, esr, fsr; member
/third_party/gstreamer/gstreamer/docs/random/wtay/
Deos348 case2 has two scheduled entities: fsr-i-q, q-fsk.
94 case3 has tree scheduled entities: fsr-t(-q1,-q2), q1-fsk. q2-fsk
138 case3 has tree scheduled entities: fsr-t(-q1,-q2), q1-fsk. q2-fsk
Deos250 case2 has two scheduled entities: fsr-i-q, q-fsk.
/third_party/openssl/crypto/poly1305/
Dpoly1305_ieee754.c103 static const u64 fsr = 1ULL<<30; variable
151 asm volatile ("ldx %0,%%fsr"::"m"(fsr)); in poly1305_init()
273 asm volatile ("ldx %0,%%fsr"::"m"(fsr)); in poly1305_blocks()
/third_party/mesa3d/src/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp54 fsr(src) in SrcRegister()
57 SrcRegister(const struct tgsi_src_register& src) : reg(src), fsr(NULL) { } in SrcRegister()
61 fsr(NULL) in SrcRegister()
78 fsr(NULL) in SrcRegister()
87 return (dim && fsr) ? fsr->Dimension.Indirect : reg.Indirect; in isIndirect()
92 return (dim && fsr) ? fsr->Dimension.Index : reg.Index; in getIndex()
103 return fsr->Indirect.ArrayID; in getArrayId()
111 assert(fsr && isIndirect(dim)); in getIndirect()
113 return SrcRegister(fsr->DimIndirect); in getIndirect()
114 return SrcRegister(fsr->Indirect); in getIndirect()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrInfo.td537 "ld [$addr], %fsr", [], IIC_iu_or_fpu_instr>;
539 "ld [$addr], %fsr", [], IIC_iu_or_fpu_instr>;
543 "ldx [$addr], %fsr", []>, Requires<[HasV9]>;
545 "ldx [$addr], %fsr", []>, Requires<[HasV9]>;
599 "st %fsr, [$addr]", [], IIC_st>;
601 "st %fsr, [$addr]", [], IIC_st>;
612 "stx %fsr, [$addr]", []>, Requires<[HasV9]>;
614 "stx %fsr, [$addr]", []>, Requires<[HasV9]>;
/third_party/mesa3d/src/amd/vulkan/
Dradv_pipeline.c104 return info->fsr.size.width != 1 || info->fsr.size.height != 1 || in radv_is_static_vrs_enabled()
105 info->fsr.combiner_ops[0] != VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR || in radv_is_static_vrs_enabled()
106 info->fsr.combiner_ops[1] != VK_FRAGMENT_SHADING_RATE_COMBINER_OP_KEEP_KHR; in radv_is_static_vrs_enabled()
1938 info.fsr = radv_pipeline_init_fragment_shading_rate_info(pipeline, pCreateInfo); in radv_pipeline_init_graphics_info()
2118 dynamic->fragment_shading_rate.size = info->fsr.size; in radv_pipeline_init_dynamic_state()
2120 dynamic->fragment_shading_rate.combiner_ops[i] = info->fsr.combiner_ops[i]; in radv_pipeline_init_dynamic_state()
Dradv_private.h2092 struct radv_fragment_shading_rate_info fsr; member
/third_party/elfutils/tests/
Drun-allregs.sh2421 70: %fsr (fsr), unsigned 32 bits
2512 83: %fsr (fsr), unsigned 64 bits