| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 110 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps()
135 unsigned SchedClass = MI->getDesc().getSchedClass(); in resolveSchedClass()
198 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
262 unsigned SCIdx = TII->get(Opcode).getSchedClass(); in computeInstrLatency()
327 unsigned SchedClass = MI->getDesc().getSchedClass(); in computeReciprocalThroughput()
340 unsigned SchedClass = TII->get(Opcode).getSchedClass(); in computeReciprocalThroughput()
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| D | DFAPacketizer.cpp | 58 unsigned Action = ItinActions[MID->getSchedClass()]; in canReserveResources()
59 if (MID->getSchedClass() == 0 || Action == 0) in canReserveResources()
67 unsigned Action = ItinActions[MID->getSchedClass()]; in reserveResources()
68 if (MID->getSchedClass() == 0 || Action == 0) in reserveResources()
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| D | ScoreboardHazardRecognizer.cpp | 127 unsigned idx = MCID->getSchedClass(); in getHazardType()
186 unsigned idx = MCID->getSchedClass(); in EmitInstruction()
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| D | TargetInstrInfo.cpp | 1045 unsigned DefClass = get(DefNode->getMachineOpcode()).getSchedClass(); in getOperandLatency()
1048 unsigned UseClass = get(UseNode->getMachineOpcode()).getSchedClass(); in getOperandLatency()
1060 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass()); in getInstrLatency()
1072 unsigned Class = MI.getDesc().getSchedClass(); in getNumMicroOps()
1106 return ItinData->getStageLatency(MI.getDesc().getSchedClass()); in getInstrLatency()
1116 unsigned DefClass = DefMI.getDesc().getSchedClass(); in hasLowDefLatency()
1192 unsigned DefClass = DefMI.getDesc().getSchedClass(); in getOperandLatency()
1193 unsigned UseClass = UseMI.getDesc().getSchedClass(); in getOperandLatency()
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| D | MachineCombiner.cpp | 370 unsigned Idx = TII->get(Opc).getSchedClass(); in instr2instrSC()
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| D | MachinePipeliner.cpp | 917 unsigned SchedClass = Inst->getDesc().getSchedClass(); in minFuncUnits()
964 unsigned SchedClass = MI.getDesc().getSchedClass(); in calcCriticalResources()
2942 unsigned InsnClass = MID->getSchedClass(); in canReserveResources()
2982 unsigned InsnClass = MID->getSchedClass(); in reserveResources()
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| D | MachineScheduler.cpp | 1891 const MCSchedClassDesc *SC = DAG->getSchedClass(&SU); in init()
2014 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in checkHazard()
2219 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in bumpNode()
2456 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in initResourceDelta()
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| D | ScheduleDAGInstrs.cpp | 592 const MCSchedClassDesc *SC = getSchedClass(SU); in initSUnits()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZHazardRecognizer.cpp | 47 const MCSchedClassDesc *SC = getSchedClass(SU); in getNumDecoderSlots()
93 const MCSchedClassDesc *SC = getSchedClass(SU); in fitsIntoCurrentGroup()
171 const MCSchedClassDesc *SC = getSchedClass(SU); in dumpSU()
272 const MCSchedClassDesc *SC = getSchedClass(SU); in EmitInstruction()
341 const MCSchedClassDesc *SC = getSchedClass(SU); in groupingCost()
390 const MCSchedClassDesc *SC = getSchedClass(SU); in resourcesCost()
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| D | SystemZHazardRecognizer.h | 121 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass() function
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| D | SystemZMachineScheduler.cpp | 254 const MCSchedClassDesc *SC = HazardRec->getSchedClass(SU); in releaseTopNode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCSchedule.cpp | 70 unsigned SchedClass = MCII.get(Inst.getOpcode()).getSchedClass(); in computeInstrLatency()
113 unsigned SchedClass = MCII.get(Inst.getOpcode()).getSchedClass(); in getReciprocalThroughput()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/MCDisassembler/ |
| D | Disassembler.cpp | 181 unsigned SCClass = Desc.getSchedClass(); in getItineraryLatency()
208 unsigned SCClass = Desc.getSchedClass(); in getLatency()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 66 if (!PredMCID || PredMCID->getSchedClass() != PPC::Sched::IIC_SprMTSPR) in isBCTRAfterSet()
90 unsigned IIC = MCID->getSchedClass(); in mustComeFirst()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64StorePairSuppress.cpp | 85 unsigned SCIdx = TII->get(AArch64::STPDi).getSchedClass(); in shouldAddSTPToBlock()
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| D | AArch64SIMDInstrOpt.cpp | 227 unsigned SCIdx = InstDesc->getSchedClass(); in shouldReplaceInst()
242 IDesc->getSchedClass()); in shouldReplaceInst()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ScheduleDAGInstrs.h | 265 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 619 unsigned getSchedClass() const { return SchedClass; } in getSchedClass() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 2154 unsigned SchedClass = MI.getDesc().getSchedClass(); in isEarlySourceInstr()
2346 unsigned SchedClass = MI.getDesc().getSchedClass(); in isLateResultInstr()
2595 unsigned SchedClass = MI.getDesc().getSchedClass(); in isTC1()
2600 unsigned SchedClass = MI.getDesc().getSchedClass(); in isTC2()
2605 unsigned SchedClass = MI.getDesc().getSchedClass(); in isTC2Early()
2610 unsigned SchedClass = MI.getDesc().getSchedClass(); in isTC4x()
4083 return ItinData->getStageLatency(MI.getDesc().getSchedClass()); in getInstrTimingClassLatency()
4333 const InstrStage &IS = *II.beginStage(MI.getDesc().getSchedClass()); in getUnits()
4400 << " Class: " << NewMI->getDesc().getSchedClass()); in genAllInsnTimingClasses()
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| D | HexagonVLIWPacketizer.cpp | 1054 auto *IS = ResourceTracker->getInstrItins()->beginStage(TID.getSchedClass()); in ignorePseudoInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/ |
| D | Instruction.h | 263 unsigned getSchedClass() const { return RD->SchedClassID; } in getSchedClass() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCInstrInfo.cpp | 402 int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass(); in getUnits()
413 int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass(); in getOtherReservedSlots()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 3332 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt()
3635 unsigned Class = Desc.getSchedClass(); in getNumMicroOps()
3909 unsigned DefClass = DefMCID.getSchedClass(); in getOperandLatency()
3910 unsigned UseClass = UseMCID.getSchedClass(); in getOperandLatency()
4360 int Latency = ItinData->getOperandCycle(DefMCID.getSchedClass(), DefIdx); in getOperandLatency()
4652 unsigned Class = MCID.getSchedClass(); in getInstrLatency()
4682 return ItinData->getStageLatency(get(Opcode).getSchedClass()); in getInstrLatency()
4719 unsigned DefClass = DefMI.getDesc().getSchedClass(); in hasLowDefLatency()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/ |
| D | InstrBuilder.cpp | 519 unsigned SchedClassID = MCDesc.getSchedClass(); in createInstrDescImpl()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.cpp | 180 return (get(Opcode).getSchedClass() == R600::Sched::TransALU); in isTransOnly()
188 return (get(Opcode).getSchedClass() == R600::Sched::VecALU); in isVectorOnly()
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