| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/ |
| D | InstrBuilder.cpp | 33 const MCSchedModel &SM = STI.getSchedModel(); in InstrBuilder()
35 computeProcResourceMasks(STI.getSchedModel(), ProcResourceMasks); in InstrBuilder()
42 const MCSchedModel &SM = STI.getSchedModel(); in initializeUsedResources()
250 const MCSchedModel &SM = STI.getSchedModel(); in populateWrites()
510 assert(STI.getSchedModel().hasInstrSchedModel() && in createInstrDescImpl()
516 const MCSchedModel &SM = STI.getSchedModel(); in createInstrDescImpl()
623 unsigned ProcID = STI.getSchedModel().getProcessorID(); in createInstruction()
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| D | Context.cpp | 32 const MCSchedModel &SM = STI.getSchedModel(); in createDefaultPipeline()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetSubtargetInfo.cpp | 54 return getSchedModel().PostRAScheduler; in enablePostRAScheduler()
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| D | TargetSchedule.cpp | 65 SchedModel = TSInfo->getSchedModel(); in init()
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| D | MachinePipeliner.cpp | 932 if (STI && STI->getSchedModel().hasInstrSchedModel()) { in minFuncUnits()
934 STI->getSchedModel().getSchedClassDesc(SchedClass); in minFuncUnits()
946 STI->getSchedModel().getProcResource(PRE.ProcResourceIdx); in minFuncUnits()
975 if (STI && STI->getSchedModel().hasInstrSchedModel()) { in calcCriticalResources()
977 STI->getSchedModel().getSchedClassDesc(SchedClass); in calcCriticalResources()
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| D | MachineCombiner.cpp | 648 SchedModel = STI->getSchedModel(); in runOnMachineFunction()
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| D | EarlyIfConversion.cpp | 912 SchedModel = STI.getSchedModel(); in runOnMachineFunction()
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| D | MachineScheduler.cpp | 2720 SchedModel = DAG->getSchedModel(); in initialize()
3328 SchedModel = DAG->getSchedModel(); in initialize()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonMachineScheduler.cpp | 255 SchedModel = DAG->getSchedModel(); in initialize()
262 const InstrItineraryData *Itin = DAG->getSchedModel()->getInstrItineraries(); in initialize()
272 Top.ResourceModel = new VLIWResourceModel(STI, DAG->getSchedModel()); in initialize()
273 Bot.ResourceModel = new VLIWResourceModel(STI, DAG->getSchedModel()); in initialize()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/Stages/ |
| D | DispatchStage.cpp | 35 DispatchWidth = Subtarget.getSchedModel().IssueWidth; in DispatchStage()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCSchedule.cpp | 91 const MCSchedModel &SM = STI.getSchedModel(); in getReciprocalThroughput()
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| D | MCSubtargetInfo.cpp | 315 InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles, in initInstrItins()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCSubtargetInfo.h | 156 const MCSchedModel &getSchedModel() const { return *CPUSchedModel; } in getSchedModel() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ScheduleDAGInstrs.h | 262 const TargetSchedModel *getSchedModel() const { return &SchedModel; } in getSchedModel() function
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| D | BasicTTIImpl.h | 470 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0) in getUnrollingPreferences()
471 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize; in getUnrollingPreferences()
522 return getST()->getSchedModel().DefaultLoadLatency; in getInstructionLatency()
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| D | MachinePipeliner.h | 444 : STI(ST), SM(ST->getSchedModel()), UseDFA(ST->useDFAforSMS()), in ResourceManager()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/MCDisassembler/ |
| D | Disassembler.cpp | 197 const MCSchedModel SCModel = STI->getSchedModel(); in getLatency()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCInstrInfo.cpp | 401 const InstrItinerary *II = STI.getSchedModel().InstrItineraries; in getUnits()
412 const InstrItinerary *II = STI.getSchedModel().InstrItineraries; in getOtherReservedSlots()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/HardwareUnits/ |
| D | RegisterFile.cpp | 417 const MCSchedModel &SM = STI.getSchedModel(); in addRegisterRead()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ConditionalCompares.cpp | 936 SchedModel = MF.getSubtarget().getSchedModel(); in runOnMachineFunction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUSubtarget.cpp | 888 const TargetSchedModel *TSchedModel = DAGInstrs->getSchedModel(); in apply()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenSubtargetInfo.inc | 24666 unsigned ProcessorID = getSchedModel().getProcessorID();
24757 unsigned ProcessorID = getSchedModel().getProcessorID();
24799 unsigned ProcessorID = getSchedModel().getProcessorID();
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1481 PredictableSelectIsExpensive = Subtarget->getSchedModel().isOutOfOrder(); in ARMTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2048 PredictableSelectIsExpensive = Subtarget.getSchedModel().isOutOfOrder(); in X86TargetLowering()
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