Searched refs:gfx10_set_sh_reg_idx3 (Results 1 – 3 of 3) sorted by relevance
357 (void*)gfx10_set_sh_reg_idx3); in si_emit_graphics()360 (void*)gfx10_set_sh_reg_idx3); in si_emit_graphics()363 (void*)gfx10_set_sh_reg_idx3); in si_emit_graphics()370 (void*)gfx10_set_sh_reg_idx3); in si_emit_graphics()393 (void*)gfx10_set_sh_reg_idx3); in si_emit_graphics()
132 gfx10_set_sh_reg_idx3(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in gfx10_set_sh_reg_idx3() function
5712 (void*)gfx10_set_sh_reg_idx3); in radv_pipeline_emit_hw_vs()5900 gfx10_set_sh_reg_idx3(cs, R_00B21C_SPI_SHADER_PGM_RSRC3_GS, in radv_pipeline_emit_hw_ngg()5902 gfx10_set_sh_reg_idx3( in radv_pipeline_emit_hw_ngg()5908 C_00B21C_CU_EN, 0, &pdevice->rad_info, (void*)gfx10_set_sh_reg_idx3); in radv_pipeline_emit_hw_ngg()5912 (void*)gfx10_set_sh_reg_idx3); in radv_pipeline_emit_hw_ngg()6165 (void*)gfx10_set_sh_reg_idx3); in radv_pipeline_emit_hw_gs()6169 (void*)gfx10_set_sh_reg_idx3); in radv_pipeline_emit_hw_gs()