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Searched refs:hasImplicitDefOfPhysReg (Results 1 – 8 of 8) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCInstrDesc.cpp44 bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, in hasImplicitDefOfPhysReg() function in MCInstrDesc
64 return hasImplicitDefOfPhysReg(Reg, &RI); in hasDefOfPhysReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCInstrDesc.h612 bool hasImplicitDefOfPhysReg(unsigned Reg,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DAMDGPUInstPrinter.cpp508 (Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC) || in printOperand()
509 Desc.hasImplicitDefOfPhysReg(AMDGPU::VCC_LO))) in printOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.cpp745 MI.getDesc().hasImplicitDefOfPhysReg(RISCV::X5)) in getOutliningType()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86DomainReassignment.cpp146 !TII->get(DstOpcode).hasImplicitDefOfPhysReg(MO.getReg())) in isLegal()
DX86InstrInfo.cpp8152 MI.getDesc().hasImplicitDefOfPhysReg(X86::RSP)) in getOutliningType()
8158 MI.getDesc().hasImplicitDefOfPhysReg(X86::RIP)) in getOutliningType()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp240 !DefMIDesc->hasImplicitDefOfPhysReg(MO.getReg())); in addPhysRegDataDeps()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp4611 if (MCID.isCall() || (MCID.hasImplicitDefOfPhysReg(ARM::CPSR) && in getPredicationCost()
4641 if (PredCost && (MCID.isCall() || (MCID.hasImplicitDefOfPhysReg(ARM::CPSR) && in getInstrLatency()