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Searched refs:ib_pad_dw_mask (Results 1 – 5 of 5) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_sdma_copy_image.c85 …uint32_t ib_pad_dw_mask = cmd_buffer->device->physical_device->rad_info.ib_pad_dw_mask[AMD_IP_SDMA… in radv_sdma_v4_v5_copy_image_to_buffer() local
90 radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, align(8, ib_pad_dw_mask + 1)); in radv_sdma_v4_v5_copy_image_to_buffer()
109 while (cmd_buffer->cs->cdw & ib_pad_dw_mask) in radv_sdma_v4_v5_copy_image_to_buffer()
134 align(15 + dcc * 3, ib_pad_dw_mask + 1)); in radv_sdma_v4_v5_copy_image_to_buffer()
179 while (cmd_buffer->cs->cdw & ib_pad_dw_mask) in radv_sdma_v4_v5_copy_image_to_buffer()
/third_party/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_cs.c1068 uint32_t ib_pad_dw_mask = ws->info.ib_pad_dw_mask[cs->ip_type]; in amdgpu_cs_setup_preemption() local
1069 while (preamble_num_dw & ib_pad_dw_mask) in amdgpu_cs_setup_preemption()
1144 uint32_t ib_pad_dw_mask = cs->ws->info.ib_pad_dw_mask[cs->ip_type]; in amdgpu_cs_check_space() local
1145 while ((rcs->current.cdw & ib_pad_dw_mask) != ib_pad_dw_mask - 3) in amdgpu_cs_check_space()
1152 assert((rcs->current.cdw & ib_pad_dw_mask) == 0); in amdgpu_cs_check_space()
1697 uint32_t ib_pad_dw_mask = ws->info.ib_pad_dw_mask[cs->ip_type]; in amdgpu_cs_flush() local
1705 while (rcs->current.cdw & ib_pad_dw_mask) in amdgpu_cs_flush()
1708 while (rcs->current.cdw & ib_pad_dw_mask) in amdgpu_cs_flush()
1715 while (rcs->current.cdw & ib_pad_dw_mask) in amdgpu_cs_flush()
1718 while (rcs->current.cdw & ib_pad_dw_mask) in amdgpu_cs_flush()
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/third_party/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_cs.c227 uint32_t ib_pad_dw_mask = MAX2(3, radv_amdgpu_winsys(ws)->info.ib_pad_dw_mask[ip_type]); in radv_amdgpu_cs_create() local
228 uint32_t ib_size = align(20 * 1024 * 4, ib_pad_dw_mask + 1); in radv_amdgpu_cs_create()
359 uint32_t ib_pad_dw_mask = MAX2(3, cs->ws->info.ib_pad_dw_mask[ip_type]); in radv_amdgpu_cs_grow() local
361 while (!cs->base.cdw || (cs->base.cdw & ib_pad_dw_mask) != ib_pad_dw_mask - 3) in radv_amdgpu_cs_grow()
384 ib_size = align(MIN2(ib_size, 0xfffff), ib_pad_dw_mask + 1); in radv_amdgpu_cs_grow()
431 uint32_t ib_pad_dw_mask = MAX2(3, cs->ws->info.ib_pad_dw_mask[ip_type]); in radv_amdgpu_cs_finalize() local
437 while (!cs->base.cdw || (cs->base.cdw & ib_pad_dw_mask) != ib_pad_dw_mask - 3) in radv_amdgpu_cs_finalize()
445 while (!cs->base.cdw || (cs->base.cdw & ib_pad_dw_mask)) in radv_amdgpu_cs_finalize()
1070 uint32_t ib_pad_dw_mask = cs0->ws->info.ib_pad_dw_mask[ip_type]; in radv_amdgpu_winsys_cs_submit_sysmem() local
1127 while (!size || (size & ib_pad_dw_mask)) { in radv_amdgpu_winsys_cs_submit_sysmem()
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/third_party/mesa3d/src/amd/common/
Dac_gpu_info.c1037 info->ib_pad_dw_mask[AMD_IP_GFX] = 0xff; in ac_query_gpu_info()
1038 info->ib_pad_dw_mask[AMD_IP_COMPUTE] = 0xff; in ac_query_gpu_info()
1039 info->ib_pad_dw_mask[AMD_IP_SDMA] = 0xf; in ac_query_gpu_info()
1040 info->ib_pad_dw_mask[AMD_IP_UVD] = 0xf; in ac_query_gpu_info()
1041 info->ib_pad_dw_mask[AMD_IP_VCE] = 0x3f; in ac_query_gpu_info()
1042 info->ib_pad_dw_mask[AMD_IP_UVD_ENC] = 0x3f; in ac_query_gpu_info()
1043 info->ib_pad_dw_mask[AMD_IP_VCN_DEC] = 0xf; in ac_query_gpu_info()
1044 info->ib_pad_dw_mask[AMD_IP_VCN_ENC] = 0x3f; in ac_query_gpu_info()
1045 info->ib_pad_dw_mask[AMD_IP_VCN_JPEG] = 0xf; in ac_query_gpu_info()
Dac_gpu_info.h90 uint32_t ib_pad_dw_mask[AMD_NUM_IP_TYPES]; member