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/third_party/mesa3d/src/intel/compiler/
Dbrw_fs_combine_constants.cpp110 struct imm { struct
162 struct imm *imm; argument
167 static struct imm *
171 if (table->imm[i].size == size && in find_imm()
172 !memcmp(table->imm[i].bytes, data, size)) { in find_imm()
173 return &table->imm[i]; in find_imm()
179 static struct imm *
184 table->imm = reralloc(mem_ctx, table->imm, struct imm, table->size); in new_imm()
186 return &table->imm[table->len++]; in new_imm()
200 const struct imm *a = (const struct imm *)_a, in compare()
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Dbrw_reg.h638 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_DF); in brw_imm_df() local
639 imm.df = df; in brw_imm_df()
640 return imm; in brw_imm_df()
646 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UQ); in brw_imm_u64() local
647 imm.u64 = u64; in brw_imm_u64()
648 return imm; in brw_imm_u64()
654 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F); in brw_imm_f() local
655 imm.f = f; in brw_imm_f()
656 return imm; in brw_imm_f()
663 struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_Q); in brw_imm_q() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoC.td220 : RVInst16CI<funct3, 0b10, (outs cls:$rd), (ins SP:$rs1, opnd:$imm),
221 OpcodeStr, "$rd, ${imm}(${rs1})">;
226 : RVInst16CSS<funct3, 0b10, (outs), (ins cls:$rs2, SP:$rs1, opnd:$imm),
227 OpcodeStr, "$rs2, ${imm}(${rs1})">;
232 : RVInst16CL<funct3, 0b00, (outs cls:$rd), (ins GPRC:$rs1, opnd:$imm),
233 OpcodeStr, "$rd, ${imm}(${rs1})">;
238 : RVInst16CS<funct3, 0b00, (outs), (ins cls:$rs2, GPRC:$rs1, opnd:$imm),
239 OpcodeStr, "$rs2, ${imm}(${rs1})">;
244 : RVInst16CB<funct3, 0b01, (outs), (ins cls:$rs1, simm9_lsb0:$imm),
245 OpcodeStr, "$rs1, $imm"> {
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/third_party/mesa3d/src/amd/compiler/
Daco_insert_waitcnt.cpp115 wait_imm imm; member
123 : imm(imm_), events(event_), counters(get_counters_for_event(event_)), in wait_entry()
133 changed |= imm.combine(other.imm); in join()
145 imm.lgkm = wait_imm::unset_counter; in remove_counter()
150 imm.vm = wait_imm::unset_counter; in remove_counter()
156 imm.exp = wait_imm::unset_counter; in remove_counter()
162 imm.vs = wait_imm::unset_counter; in remove_counter()
272 wait.combine(it->second.imm); in check_instr()
296 wait.combine(it->second.imm); in check_instr()
302 parse_wait_instr(wait_ctx& ctx, wait_imm& imm, Instruction* instr) in parse_wait_instr() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrAliases.td65 // b<cond> $imm
66 def : InstAlias<!strconcat(!strconcat("b", cond), " $imm"),
67 (BCOND brtarget:$imm, condVal)>;
69 // b<cond>,a $imm
70 def : InstAlias<!strconcat(!strconcat("b", cond), ",a $imm"),
71 (BCONDA brtarget:$imm, condVal)>;
73 // b<cond> %icc, $imm
74 def : InstAlias<!strconcat(!strconcat("b", cond), " %icc, $imm"),
75 (BPICC brtarget:$imm, condVal)>, Requires<[HasV9]>;
77 // b<cond>,pt %icc, $imm
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DSparc.h149 inline static unsigned HI22(int64_t imm) { in HI22() argument
150 return (unsigned)((imm >> 10) & ((1 << 22)-1)); in HI22()
153 inline static unsigned LO10(int64_t imm) { in LO10() argument
154 return (unsigned)(imm & 0x3FF); in LO10()
157 inline static unsigned HIX22(int64_t imm) { in HIX22() argument
158 return HI22(~imm); in HIX22()
161 inline static unsigned LOX10(int64_t imm) { in LOX10() argument
162 return ~LO10(~imm); in LOX10()
/third_party/pcre2/pcre2/src/sljit/
DsljitNativePPC_64.c41 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) in load_immediate() argument
48 if (imm <= SIMM_MAX && imm >= SIMM_MIN) in load_immediate()
49 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
51 if (!(imm & ~0xffff)) in load_immediate()
52 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
54 if (imm <= 0x7fffffffl && imm >= -0x80000000l) { in load_immediate()
55 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
56 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
60 tmp = (sljit_uw)((imm >= 0) ? imm : ~imm); in load_immediate()
64 tmp = ((sljit_uw)imm << shift); in load_immediate()
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DsljitNativePPC_32.c29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) in load_immediate() argument
31 if (imm <= SIMM_MAX && imm >= SIMM_MIN) in load_immediate()
32 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
34 if (!(imm & ~0xffff)) in load_immediate()
35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
37 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
104 return push_inst(compiler, ADDIS | D(dst) | A(src1) | compiler->imm); in emit_single_op()
107 …h_inst(compiler, ADDIS | D(dst) | A(src1) | (((compiler->imm >> 16) & 0xffff) + ((compiler->imm >>… in emit_single_op()
111 return push_inst(compiler, ADDI | D(dst) | A(src1) | (compiler->imm & 0xffff)); in emit_single_op()
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DsljitNativeARM_T2_32.c66 #define IMM3(imm) ((sljit_ins)imm << 6) argument
67 #define IMM8(imm) ((sljit_ins)imm) argument
85 #define IMM5(imm) \ argument
86 (COPY_BITS(imm, 2, 12, 3) | (((sljit_ins)imm & 0x3) << 6))
87 #define IMM12(imm) \ argument
88 (COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | ((sljit_ins)imm & 0xff))
232 …JIT_INLINE sljit_s32 emit_imm32_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_uw imm) in emit_imm32_const() argument
235 …| COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff))… in emit_imm32_const()
237 …| COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) … in emit_imm32_const()
508 static sljit_uw get_imm(sljit_uw imm) in get_imm() argument
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DsljitNativeARM_32.c405 static SLJIT_INLINE sljit_s32 emit_imm(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) in emit_imm() argument
407 FAIL_IF(push_inst(compiler, MOVW | RD(reg) | ((imm << 4) & 0xf0000) | ((sljit_u32)imm & 0xfff))); in emit_imm()
408 …return push_inst(compiler, MOVT | RD(reg) | ((imm >> 12) & 0xf0000) | (((sljit_u32)imm >> 16) & 0x… in emit_imm()
565 static sljit_uw get_imm(sljit_uw imm);
566 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_uw imm);
1019 #define TYPE2_TRANSFER_IMM(imm) \ argument
1020 (((imm) & 0xf) | (((imm) & 0xf0) << 4) | (1 << 22))
1051 sljit_uw imm, offset; in sljit_emit_enter() local
1065 imm = 0; in sljit_emit_enter()
1069 imm |= (sljit_uw)1 << reg_map[i]; in sljit_emit_enter()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.td66 def i64immSExt32 : PatLeaf<(i64 imm),
68 def i32immSExt32 : PatLeaf<(i32 imm),
84 def BPF_CC_EQ : PatLeaf<(i64 imm),
86 def BPF_CC_NE : PatLeaf<(i64 imm),
88 def BPF_CC_GE : PatLeaf<(i64 imm),
90 def BPF_CC_GT : PatLeaf<(i64 imm),
92 def BPF_CC_GTU : PatLeaf<(i64 imm),
94 def BPF_CC_GEU : PatLeaf<(i64 imm),
96 def BPF_CC_LE : PatLeaf<(i64 imm),
98 def BPF_CC_LT : PatLeaf<(i64 imm),
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/third_party/flutter/skia/src/core/
DSkVM.cpp76 && a.imm == b.imm in operator ==()
83 Val Builder::push(Op op, Val x, Val y, Val z, int imm) { in push() argument
84 Instruction inst{op, x, y, z, imm, /*death=*/0, /*hoist=*/true}; in push()
99 && fProgram[id].imm == 0; in isZero()
235 static Mod mod(int imm) { in mod() argument
236 if (imm == 0) { return Mod::Indirect; } in mod()
237 if (SkTFitsIn<int8_t>(imm)) { return Mod::OneByteImm; } in mod()
362 void Assembler::op(int opcode, int opcode_ext, GP64 dst, int imm) { in op() argument
367 if (SkTFitsIn<int8_t>(imm)) { in op()
375 this->bytes(&imm, imm_bytes); in op()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td118 // Short jump targets have OtherVT type and are printed as pcrel imm values.
192 (MSP430selectcc GR8:$src, GR8:$src2, imm:$cc))]>;
196 (MSP430selectcc GR16:$src, GR16:$src2, imm:$cc))]>;
255 def Bi : I16ri<0b0100, (outs), (ins i16imm:$imm),
256 "br\t$imm",
257 [(brind tblockaddress:$imm)]>;
271 [(MSP430brcc bb:$dst, imm:$cond)]>;
285 (outs), (ins i16imm:$imm),
286 "call\t$imm", [(MSP430call imm:$imm)]>;
311 def PUSH16c : II16c<0b100, (outs), (ins cg16imm:$imm), "push\t$imm", []>;
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DMSP430InstrFormats.td77 bits<16> imm;
78 let Inst{31-16} = imm;
88 bits<6> imm;
92 let Inst{11-8} = imm{3-0};
95 let Inst{5-4} = imm{5-4};
133 bits<16> imm;
136 let Inst{31-16} = imm;
147 bits<6> imm;
152 let Inst{11-8} = imm{3-0};
155 let Inst{5-4} = imm{5-4};
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/third_party/libbpf/include/linux/
Dfilter.h14 .imm = IMM })
22 .imm = IMM })
30 .imm = IMM })
38 .imm = IMM })
46 .imm = 0 })
54 .imm = ((FUNC) - BPF_FUNC_unspec) })
62 .imm = 0 })
70 .imm = 0 })
78 .imm = IMM })
86 .imm = 0 })
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/third_party/mesa3d/src/gallium/frontends/d3d10umd/
DShaderTGSI.c318 if (sx->clip_distance_mapping[0].d3d == operand->base.index[0].imm) { in translate_semantic_index()
321 assert(sx->clip_distance_mapping[1].d3d == operand->base.index[0].imm); in translate_semantic_index()
429 unsigned idx = operand->base.index[0].imm; in dcl_base_output()
493 assert(dst->base.index[0].imm < SHADER_MAX_INPUTS); in dcl_vs_input()
495 reg = ureg_DECL_vs_input(ureg, dst->base.index[0].imm); in dcl_vs_input()
497 dcl_base_input(sx, ureg, dst, reg, dst->base.index[0].imm, in dcl_vs_input()
507 assert(dst->base.index[1].imm < SHADER_MAX_INPUTS); in dcl_gs_input()
509 declare_vertices_in(sx, dst->base.index[0].imm); in dcl_gs_input()
513 if (!sx->inputs[dst->base.index[1].imm].reg.File) { in dcl_gs_input()
517 dst->base.index[1].imm, in dcl_gs_input()
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/third_party/mesa3d/src/gallium/auxiliary/rtasm/
Drtasm_x86sse.c455 void x86_mov_reg_imm( struct x86_function *p, struct x86_reg dst, int imm ) in x86_mov_reg_imm() argument
457 DUMP_RI( dst, imm ); in x86_mov_reg_imm()
461 emit_1i(p, imm); in x86_mov_reg_imm()
464 void x86_mov_imm( struct x86_function *p, struct x86_reg dst, int imm ) in x86_mov_imm() argument
466 DUMP_RI( dst, imm ); in x86_mov_imm()
468 x86_mov_reg_imm(p, dst, imm); in x86_mov_imm()
473 emit_1i(p, imm); in x86_mov_imm()
477 void x86_mov16_imm( struct x86_function *p, struct x86_reg dst, uint16_t imm ) in x86_mov16_imm() argument
479 DUMP_RI( dst, imm ); in x86_mov16_imm()
484 emit_2ub(p, imm & 0xff, imm >> 8); in x86_mov16_imm()
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Drtasm_x86sse.h203 void x86_mov_reg_imm( struct x86_function *p, struct x86_reg dst, int imm );
204 void x86_add_imm( struct x86_function *p, struct x86_reg dst, int imm );
205 void x86_or_imm( struct x86_function *p, struct x86_reg dst, int imm );
206 void x86_and_imm( struct x86_function *p, struct x86_reg dst, int imm );
207 void x86_sub_imm( struct x86_function *p, struct x86_reg dst, int imm );
208 void x86_xor_imm( struct x86_function *p, struct x86_reg dst, int imm );
209 void x86_cmp_imm( struct x86_function *p, struct x86_reg dst, int imm );
256 void sse2_psllw_imm( struct x86_function *p, struct x86_reg dst, unsigned imm );
257 void sse2_pslld_imm( struct x86_function *p, struct x86_reg dst, unsigned imm );
258 void sse2_psllq_imm( struct x86_function *p, struct x86_reg dst, unsigned imm );
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td64 def LO16 : SDNodeXForm<imm, [{
71 def HI16 : SDNodeXForm<imm, [{
76 def NEG : SDNodeXForm<imm, [{
80 def LO21 : SDNodeXForm<imm, [{
105 def immShift : Operand<i32>, PatLeaf<(imm), [{
113 def imm10 : Operand<i32>, PatLeaf<(imm), [{
119 def i32lo16z : Operand<i32>, PatLeaf<(i32 imm), [{
125 def i32neg16 : Operand<i32>, PatLeaf<(i32 imm), [{
132 def i32lo16s : Operand<i32>, PatLeaf<(i32 imm), [{
140 def i32lo16and : Operand<i32>, PatLeaf<(i32 imm), [{
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrThumb2.td56 def t2_so_reg : Operand<i32>, // reg imm
67 def t2_so_imm_not_XFORM : SDNodeXForm<imm, [{
73 def t2_so_imm_neg_XFORM : SDNodeXForm<imm, [{
81 def t2_so_imm_notSext16_XFORM : SDNodeXForm<imm, [{
109 def t2_so_imm_not : Operand<i32>, PatLeaf<(imm), [{
117 def t2_so_imm_notSext : Operand<i32>, PatLeaf<(imm), [{
143 def imm0_4095_neg : Operand<i32>, PatLeaf<(i32 imm), [{
149 def imm1_255_neg : PatLeaf<(i32 imm), [{
154 def imm0_255_not : PatLeaf<(i32 imm), [{
158 def lo5AllOne : PatLeaf<(i32 imm), [{
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceAssemblerX8632.cpp279 void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Immediate &imm) { in mov() argument
286 emitUint8(imm.value() & 0xFF); in mov()
291 emitImmediate(Ty, imm); in mov()
331 void AssemblerX8632::mov(Type Ty, const AsmAddress &dst, const Immediate &imm) { in mov() argument
339 emitUint8(imm.value() & 0xFF); in mov()
344 emitImmediate(Ty, imm); in mov()
980 void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Immediate &imm) { in psll() argument
982 assert(imm.is_int8()); in psll()
992 emitUint8(imm.value() & 0xFF); in psll()
1021 void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Immediate &imm) { in psra() argument
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DIceAssemblerX8664.cpp261 void AssemblerX8664::mov(Type Ty, GPRRegister dst, const Immediate &imm) { in mov() argument
269 emitUint8(imm.value() & 0xFF); in mov()
274 emitImmediate(Ty, imm); in mov()
317 void AssemblerX8664::mov(Type Ty, const AsmAddress &dst, const Immediate &imm) { in mov() argument
326 emitUint8(imm.value() & 0xFF); in mov()
331 emitImmediate(Ty, imm); in mov()
1046 void AssemblerX8664::psll(Type Ty, XmmRegister dst, const Immediate &imm) { in psll() argument
1048 assert(imm.is_int8()); in psll()
1059 emitUint8(imm.value() & 0xFF); in psll()
1090 void AssemblerX8664::psra(Type Ty, XmmRegister dst, const Immediate &imm) { in psra() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips64InstrInfo.td23 def immSExt10_64 : PatLeaf<(i64 imm),
26 def immZExt16_64 : PatLeaf<(i64 imm),
32 def Log2LO : SDNodeXForm<imm, [{
37 def Log2HI : SDNodeXForm<imm, [{
42 def PowerOf2LO : PatLeaf<(imm), [{
52 def PowerOf2HI : PatLeaf<(imm), [{
61 def PowerOf2LO_i32 : PatLeaf<(imm), [{
465 [(set RO:$rt, (Op RO:$rs, PosImm:$pos, imm:$lenm1))],
648 def : MipsPat<(i64 immZExt32Low16Zero:$imm),
649 (DSLL (ORi64 ZERO_64, (HI16 imm:$imm)), 16)>, ISA_MIPS3, GPR_64;
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/third_party/ltp/include/lapi/
Dbpf.h78 int32_t imm; /* signed immediate constant */ member
453 .imm = 0 })
461 .imm = 0 })
469 .imm = IMM })
477 .imm = IMM })
485 .imm = 0 })
493 .imm = 0 })
504 .imm = (uint32_t) (IMM) }), \
510 .imm = ((uint64_t) (IMM)) >> 32 })
522 .imm = IMM })
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInfo.td301 defm CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm),
302 (outs), (ins i32imm_op:$imm),
303 [(set I32:$res, imm:$imm)],
304 "i32.const\t$res, $imm", "i32.const\t$imm", 0x41>;
305 defm CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm),
306 (outs), (ins i64imm_op:$imm),
307 [(set I64:$res, imm:$imm)],
308 "i64.const\t$res, $imm", "i64.const\t$imm", 0x42>;
309 defm CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm),
310 (outs), (ins f32imm_op:$imm),
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