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Searched refs:isOptionalDef (Results 1 – 9 of 9) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCInstrDesc.h104 bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); } in isOptionalDef() function
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetSchedule.cpp242 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() in computeOperandLatency()
DMachineVerifier.cpp1591 else if (!MO->isDef() && !MCOI.isOptionalDef()) in visitMachineOperand()
1602 if (MO->isDef() && !MCOI.isOptionalDef()) in visitMachineOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumb2SizeReduction.cpp831 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr()
938 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceToNarrow()
DARMISelLowering.cpp10917 if (!MI.hasOptionalDef() || !MCID->OpInfo[ccOutIdx].isOptionalDef()) { in AdjustInstrPostInstrSelection()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp219 if (II.OpInfo[i].isOptionalDef()) { in CreateVirtualRegisters()
305 MCID.OpInfo[IIOpNum].isOptionalDef(); in AddRegisterOperand()
DScheduleDAGRRList.cpp1419 if (MCID.OpInfo[i].isOptionalDef()) { in DelayForLiveRegsBottomUp()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp736 if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) { in AddThumb1SBit()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp10247 !MCID.OpInfo[OpNo].isOptionalDef() && OpNo < MCID.NumOperands; in checkTargetMatchPredicate()