/third_party/mesa3d/src/freedreno/ir3/ |
D | ir3_legalize.c | 97 bool mergedregs = ctx->so->mergedregs; in legalize_block() local 167 regmask_init(&state->needs_ss_war, mergedregs); in legalize_block() 168 regmask_init(&state->needs_ss, mergedregs); in legalize_block() 169 regmask_init(&state->needs_sy, mergedregs); in legalize_block() 174 regmask_init(&state->needs_ss_war, mergedregs); in legalize_block() 175 regmask_init(&state->needs_ss, mergedregs); in legalize_block() 200 regmask_init(&state->needs_ss_war, mergedregs); in legalize_block() 201 regmask_init(&state->needs_ss, mergedregs); in legalize_block() 206 regmask_init(&state->needs_sy, mergedregs); in legalize_block() 215 regmask_init(&state->needs_ss_war, mergedregs); in legalize_block() [all …]
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D | ir3_delay.c | 216 unsigned consumer_n, bool mergedregs) in delay_calc_srcn() argument 226 if ((!mergedregs || is_reg_special(src) || is_reg_special(dst)) && in delay_calc_srcn() 244 regmask_t *in_mask, bool mergedregs) in delay_calc() argument 278 assigner, consumer, dst_n, src_n, mergedregs); in delay_calc() 311 &mask, mergedregs); in delay_calc() 327 bool mergedregs) in ir3_delay_calc() argument 330 regmask_init(&mask, mergedregs); in ir3_delay_calc() 336 return delay_calc(block, NULL, instr, 0, &mask, mergedregs); in ir3_delay_calc()
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D | ir3_disk_cache.c | 179 v->mergedregs = blob_read_uint32(blob); in ir3_retrieve_variant() 192 v->binning->mergedregs = v->mergedregs; in ir3_retrieve_variant() 206 blob_write_uint32(blob, v->mergedregs); in ir3_store_variant()
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D | ir3.h | 1728 struct ir3_instruction *instr, bool mergedregs); 2455 bool mergedregs; member 2462 if (regmask->mergedregs) { in __regmask_get() 2490 if (regmask->mergedregs) { in __regmask_set() 2515 if (regmask->mergedregs) { in __regmask_clear() 2538 regmask_init(regmask_t *regmask, bool mergedregs) in regmask_init() argument 2541 regmask->mergedregs = mergedregs; in regmask_init() 2547 assert(dst->mergedregs == a->mergedregs); in regmask_or() 2548 assert(dst->mergedregs == b->mergedregs); in regmask_or() 2560 if (b->mergedregs) { in regmask_or_shared()
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D | ir3_assembler.c | 46 v->mergedregs = true; in ir3_parse_asm()
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D | ir3_shader.c | 84 if (!v->mergedregs) { in fixup_regfootprint() 101 if (!v->mergedregs) { in fixup_regfootprint() 115 if (!v->mergedregs) { in fixup_regfootprint() 336 v->mergedregs = shader->compiler->gen >= 6; in alloc_variant()
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D | ir3_ra.c | 2400 add_pressure(&cur_pressure, input->dsts[0], v->mergedregs); in calc_min_limit_pressure() 2417 if (!(dst->flags & IR3_REG_HALF) || v->mergedregs) in calc_min_limit_pressure() 2451 add_pressure(&cur_pressure, dst, v->mergedregs); in calc_min_limit_pressure() 2465 add_pressure(&cur_pressure, interval->reg, v->mergedregs); in calc_min_limit_pressure() 2479 add_pressure(&cur_pressure, dst, v->mergedregs); in calc_min_limit_pressure() 2531 if (v->mergedregs) { in calc_limit_pressure_for_cs_with_barrier() 2550 ctx->merged_regs = v->mergedregs; in ir3_ra() 2618 if (!v->mergedregs) in ir3_ra()
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D | ir3_postsched.c | 503 .merged = ctx->v->mergedregs, in calculate_forward_deps() 517 .merged = ctx->v->mergedregs, in calculate_reverse_deps()
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D | ir3_ra_validate.c | 556 ctx->merged_regs = v->mergedregs; in ir3_ra_validate()
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D | ir3_shader.h | 695 bool mergedregs; member
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D | ir3_lower_parallelcopy.c | 487 if (v->mergedregs) { in handle_copies()
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D | ir3.c | 121 if (v->mergedregs) { in collect_reg_info()
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D | ir3_spill.c | 518 ctx->merged_regs = v->mergedregs; in spill_ctx_init()
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/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
D | fd6_program.c | 565 COND(vs->mergedregs, A6XX_SP_VS_CTRL_REG0_MERGEDREGS) | in setup_stateobj() 694 assert(vs->mergedregs == hs->mergedregs); in setup_stateobj() 866 COND(fs->mergedregs, A6XX_SP_FS_CTRL_REG0_MERGEDREGS) | in setup_stateobj() 959 assert(gs->mergedregs == (ds ? ds->mergedregs : vs->mergedregs)); in setup_stateobj()
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D | fd6_compute.c | 69 COND(v->mergedregs, A6XX_SP_CS_CTRL_REG0_MERGEDREGS) | in cs_program_emit()
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/third_party/mesa3d/docs/relnotes/ |
D | 20.2.3.rst | 76 - freedreno/cffdec: When .mergedregs is set, don't count half regs.
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D | 22.0.0.rst | 3770 - freedreno/computerator: Fix mergedregs
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D | 20.3.0.rst | 1453 - freedreno/cffdec: When .mergedregs is set, don't count half regs.
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D | 20.2.0.rst | 4106 - freedreno/ir3: make mergedregs a property of the variant
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/third_party/mesa3d/src/freedreno/computerator/ |
D | a6xx.c | 155 COND(v->mergedregs, A6XX_SP_CS_CTRL_REG0_MERGEDREGS) | in cs_program_emit()
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/third_party/mesa3d/src/freedreno/vulkan/ |
D | tu_pipeline.c | 490 .mergedregs = xs->mergedregs, in tu6_emit_xs() 519 .mergedregs = xs->mergedregs, in tu6_emit_xs() 533 .mergedregs = xs->mergedregs, in tu6_emit_xs()
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