| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_meta_bufimage.c | 121 &device->meta_state.alloc, in radv_device_init_meta_itob_state()
122 &device->meta_state.itob.img_ds_layout); in radv_device_init_meta_itob_state()
129 .pSetLayouts = &device->meta_state.itob.img_ds_layout, in radv_device_init_meta_itob_state()
136 &device->meta_state.alloc, &device->meta_state.itob.img_p_layout); in radv_device_init_meta_itob_state()
154 .layout = device->meta_state.itob.img_p_layout, in radv_device_init_meta_itob_state()
158 radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in radv_device_init_meta_itob_state()
159 &vk_pipeline_info, NULL, &device->meta_state.itob.pipeline); in radv_device_init_meta_itob_state()
175 .layout = device->meta_state.itob.img_p_layout, in radv_device_init_meta_itob_state()
179 radv_device_to_handle(device), radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in radv_device_init_meta_itob_state()
180 &vk_pipeline_info_3d, NULL, &device->meta_state.itob.pipeline_3d); in radv_device_init_meta_itob_state()
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| D | radv_meta_fast_clear.c | 102 radv_device_to_handle(device), &ds_create_info, &device->meta_state.alloc, in create_dcc_compress_compute()
103 &device->meta_state.fast_clear_flush.dcc_decompress_compute_ds_layout); in create_dcc_compress_compute()
110 .pSetLayouts = &device->meta_state.fast_clear_flush.dcc_decompress_compute_ds_layout, in create_dcc_compress_compute()
116 radv_device_to_handle(device), &pl_create_info, &device->meta_state.alloc, in create_dcc_compress_compute()
117 &device->meta_state.fast_clear_flush.dcc_decompress_compute_p_layout); in create_dcc_compress_compute()
135 .layout = device->meta_state.fast_clear_flush.dcc_decompress_compute_p_layout, in create_dcc_compress_compute()
139 radv_device_to_handle(device), radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in create_dcc_compress_compute()
141 &device->meta_state.fast_clear_flush.dcc_decompress_compute_pipeline); in create_dcc_compress_compute()
162 &device->meta_state.alloc, layout); in create_pipeline_layout()
233 device_h, radv_pipeline_cache_to_handle(&device->meta_state.cache), in create_pipeline()
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| D | radv_meta_blit2d.c | 117 device->meta_state.blit2d[log2_samples].p_layouts[src_type], 0, /* set */ in blit2d_bind_src()
128 device->meta_state.blit2d[log2_samples].p_layouts[src_type], in blit2d_bind_src()
135 device->meta_state.blit2d[log2_samples].p_layouts[src_type], in blit2d_bind_src()
140 device->meta_state.blit2d[log2_samples].p_layouts[src_type], 0, /* set */ in blit2d_bind_src()
168 cmd_buffer->device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]; in bind_pipeline()
179 cmd_buffer->device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type]; in bind_depth_pipeline()
190 cmd_buffer->device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type]; in bind_stencil_pipeline()
234 device->meta_state.blit2d[log2_samples].p_layouts[src_type], in radv_meta_blit2d_normal_dst()
243 if (device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key] == in radv_meta_blit2d_normal_dst()
276 if (device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type] == in radv_meta_blit2d_normal_dst()
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| D | radv_meta_resolve_fs.c | 86 &device->meta_state.alloc, in create_layout()
87 &device->meta_state.resolve_fragment.ds_layout); in create_layout()
94 .pSetLayouts = &device->meta_state.resolve_fragment.ds_layout, in create_layout()
100 &device->meta_state.alloc, in create_layout()
101 &device->meta_state.resolve_fragment.p_layout); in create_layout()
118 mtx_lock(&device->meta_state.mtx); in create_resolve_pipeline()
121 VkPipeline *pipeline = &device->meta_state.resolve_fragment.rc[samples_log2].pipeline[fs_key]; in create_resolve_pipeline()
123 mtx_unlock(&device->meta_state.mtx); in create_resolve_pipeline()
214 .layout = device->meta_state.resolve_fragment.p_layout, in create_resolve_pipeline()
222 radv_device_to_handle(device), radv_pipeline_cache_to_handle(&device->meta_state.cache), in create_resolve_pipeline()
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| D | radv_meta_blit.c | 263 device->meta_state.blit.pipeline_layout, VK_SHADER_STAGE_VERTEX_BIT, 0, 20, in meta_emit_blit()
277 pipeline = &device->meta_state.blit.pipeline_1d_src[fs_key]; in meta_emit_blit()
280 pipeline = &device->meta_state.blit.pipeline_2d_src[fs_key]; in meta_emit_blit()
283 pipeline = &device->meta_state.blit.pipeline_3d_src[fs_key]; in meta_emit_blit()
295 pipeline = &device->meta_state.blit.depth_only_1d_pipeline; in meta_emit_blit()
298 pipeline = &device->meta_state.blit.depth_only_2d_pipeline; in meta_emit_blit()
301 pipeline = &device->meta_state.blit.depth_only_3d_pipeline; in meta_emit_blit()
313 pipeline = &device->meta_state.blit.stencil_only_1d_pipeline; in meta_emit_blit()
316 pipeline = &device->meta_state.blit.stencil_only_2d_pipeline; in meta_emit_blit()
319 pipeline = &device->meta_state.blit.stencil_only_3d_pipeline; in meta_emit_blit()
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| D | radv_meta_dcc_retile.c | 86 struct radv_meta_state *state = &device->meta_state; in radv_device_finish_meta_dcc_retile_state()
133 &device->meta_state.alloc, in radv_device_init_meta_dcc_retile_state()
134 &device->meta_state.dcc_retile.ds_layout); in radv_device_init_meta_dcc_retile_state()
141 .pSetLayouts = &device->meta_state.dcc_retile.ds_layout, in radv_device_init_meta_dcc_retile_state()
148 &device->meta_state.alloc, &device->meta_state.dcc_retile.p_layout); in radv_device_init_meta_dcc_retile_state()
166 .layout = device->meta_state.dcc_retile.p_layout, in radv_device_init_meta_dcc_retile_state()
170 radv_device_to_handle(device), radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in radv_device_init_meta_dcc_retile_state()
171 &vk_pipeline_info, NULL, &device->meta_state.dcc_retile.pipeline[surf->u.gfx9.swizzle_mode]); in radv_device_init_meta_dcc_retile_state()
198 if (!cmd_buffer->device->meta_state.dcc_retile.pipeline[swizzle_mode]) { in radv_retile_dcc()
212 device->meta_state.dcc_retile.pipeline[swizzle_mode]); in radv_retile_dcc()
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| D | radv_meta_buffer.c | 86 &device->meta_state.alloc, in radv_device_init_meta_buffer_state()
87 &device->meta_state.buffer.fill_p_layout); in radv_device_init_meta_buffer_state()
100 &device->meta_state.alloc, in radv_device_init_meta_buffer_state()
101 &device->meta_state.buffer.copy_p_layout); in radv_device_init_meta_buffer_state()
117 .layout = device->meta_state.buffer.fill_p_layout, in radv_device_init_meta_buffer_state()
121 radv_device_to_handle(device), radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in radv_device_init_meta_buffer_state()
122 &fill_vk_pipeline_info, NULL, &device->meta_state.buffer.fill_pipeline); in radv_device_init_meta_buffer_state()
138 .layout = device->meta_state.buffer.copy_p_layout, in radv_device_init_meta_buffer_state()
142 radv_device_to_handle(device), radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in radv_device_init_meta_buffer_state()
143 ©_vk_pipeline_info, NULL, &device->meta_state.buffer.copy_pipeline); in radv_device_init_meta_buffer_state()
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| D | radv_meta_decompress.c | 103 radv_device_to_handle(device), &ds_create_info, &device->meta_state.alloc, in create_expand_depth_stencil_compute()
104 &device->meta_state.expand_depth_stencil_compute_ds_layout); in create_expand_depth_stencil_compute()
111 .pSetLayouts = &device->meta_state.expand_depth_stencil_compute_ds_layout, in create_expand_depth_stencil_compute()
117 radv_device_to_handle(device), &pl_create_info, &device->meta_state.alloc, in create_expand_depth_stencil_compute()
118 &device->meta_state.expand_depth_stencil_compute_p_layout); in create_expand_depth_stencil_compute()
136 .layout = device->meta_state.expand_depth_stencil_compute_p_layout, in create_expand_depth_stencil_compute()
140 radv_device_to_handle(device), radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in create_expand_depth_stencil_compute()
142 &device->meta_state.expand_depth_stencil_compute_pipeline); in create_expand_depth_stencil_compute()
163 &device->meta_state.alloc, layout); in create_pipeline_layout()
173 mtx_lock(&device->meta_state.mtx); in create_pipeline()
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| D | radv_meta_resolve_cs.c | 255 &device->meta_state.alloc, in create_layout()
256 &device->meta_state.resolve_compute.ds_layout); in create_layout()
263 .pSetLayouts = &device->meta_state.resolve_compute.ds_layout, in create_layout()
269 &device->meta_state.alloc, in create_layout()
270 &device->meta_state.resolve_compute.p_layout); in create_layout()
284 mtx_lock(&device->meta_state.mtx); in create_resolve_pipeline()
286 mtx_unlock(&device->meta_state.mtx); in create_resolve_pipeline()
306 .layout = device->meta_state.resolve_compute.p_layout, in create_resolve_pipeline()
310 radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in create_resolve_pipeline()
316 mtx_unlock(&device->meta_state.mtx); in create_resolve_pipeline()
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| D | radv_query.c | 757 mtx_lock(&device->meta_state.mtx); in radv_device_init_meta_query_state_internal()
758 if (device->meta_state.query.pipeline_statistics_query_pipeline) { in radv_device_init_meta_query_state_internal()
759 mtx_unlock(&device->meta_state.mtx); in radv_device_init_meta_query_state_internal()
786 &device->meta_state.alloc, in radv_device_init_meta_query_state_internal()
787 &device->meta_state.query.ds_layout); in radv_device_init_meta_query_state_internal()
794 .pSetLayouts = &device->meta_state.query.ds_layout, in radv_device_init_meta_query_state_internal()
801 &device->meta_state.alloc, &device->meta_state.query.p_layout); in radv_device_init_meta_query_state_internal()
817 .layout = device->meta_state.query.p_layout, in radv_device_init_meta_query_state_internal()
821 radv_device_to_handle(device), radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in radv_device_init_meta_query_state_internal()
822 &occlusion_vk_pipeline_info, NULL, &device->meta_state.query.occlusion_query_pipeline); in radv_device_init_meta_query_state_internal()
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| D | radv_meta_clear.c | 91 device_h, radv_pipeline_cache_to_handle(&device->meta_state.cache), in create_pipeline()
180 mtx_lock(&device->meta_state.mtx); in create_color_pipeline()
182 mtx_unlock(&device->meta_state.mtx); in create_color_pipeline()
232 &rendering_create_info, device->meta_state.clear_color_p_layout, in create_color_pipeline()
233 &extra, &device->meta_state.alloc, pipeline); in create_color_pipeline()
235 mtx_unlock(&device->meta_state.mtx); in create_color_pipeline()
242 struct radv_meta_state *state = &device->meta_state; in finish_meta_clear_htile_mask_state()
255 struct radv_meta_state *state = &device->meta_state; in finish_meta_clear_dcc_comp_to_single_state()
270 struct radv_meta_state *state = &device->meta_state; in radv_device_finish_meta_clear_state()
344 if (device->meta_state.color_clear[samples_log2][clear_att->colorAttachment] in emit_color_clear()
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| D | radv_meta_fmask_copy.c | 131 struct radv_meta_state *state = &device->meta_state; in radv_device_finish_meta_fmask_copy_state()
146 struct radv_meta_state *state = &device->meta_state; in create_fmask_copy_pipeline()
195 &device->meta_state.alloc, in radv_device_init_meta_fmask_copy_state()
196 &device->meta_state.fmask_copy.ds_layout); in radv_device_init_meta_fmask_copy_state()
203 .pSetLayouts = &device->meta_state.fmask_copy.ds_layout, in radv_device_init_meta_fmask_copy_state()
210 &device->meta_state.alloc, &device->meta_state.fmask_copy.p_layout); in radv_device_init_meta_fmask_copy_state()
216 … result = create_fmask_copy_pipeline(device, samples, &device->meta_state.fmask_copy.pipeline[i]); in radv_device_init_meta_fmask_copy_state()
298 cmd_buffer->device->meta_state.fmask_copy.pipeline[samples_log2]); in radv_fmask_copy()
336 cmd_buffer->device->meta_state.fmask_copy.p_layout, 0, /* set */ in radv_fmask_copy()
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| D | radv_meta_resolve.c | 71 if (!device->meta_state.resolve.p_layout) { in create_pipeline()
74 &device->meta_state.alloc, &device->meta_state.resolve.p_layout); in create_pipeline()
87 device_h, radv_pipeline_cache_to_handle(&device->meta_state.cache), in create_pipeline()
169 .layout = device->meta_state.resolve.p_layout, in create_pipeline()
177 &device->meta_state.alloc, pipeline); in create_pipeline()
191 struct radv_meta_state *state = &device->meta_state; in radv_device_finish_meta_resolve_state()
208 struct radv_meta_state *state = &device->meta_state; in radv_device_init_meta_resolve_state()
247 device->meta_state.resolve.pipeline[fs_key]); in emit_resolve()
334 if (device->meta_state.resolve.pipeline[fs_key]) in build_resolve_pipeline()
337 mtx_lock(&device->meta_state.mtx); in build_resolve_pipeline()
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| D | radv_meta.h | 244 struct radv_meta_state *meta_state = &cmd_buffer->device->meta_state; in radv_is_fmask_decompress_pipeline() local
248 meta_state->fast_clear_flush.fmask_decompress_pipeline; in radv_is_fmask_decompress_pipeline()
257 struct radv_meta_state *meta_state = &cmd_buffer->device->meta_state; in radv_is_dcc_decompress_pipeline() local
261 meta_state->fast_clear_flush.dcc_decompress_pipeline; in radv_is_dcc_decompress_pipeline()
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| D | radv_meta_etc_decode.c | 544 &device->meta_state.alloc, in create_layout()
545 &device->meta_state.etc_decode.ds_layout); in create_layout()
552 .pSetLayouts = &device->meta_state.etc_decode.ds_layout, in create_layout()
559 &device->meta_state.alloc, &device->meta_state.etc_decode.p_layout); in create_layout()
572 mtx_lock(&device->meta_state.mtx); in create_decode_pipeline()
574 mtx_unlock(&device->meta_state.mtx); in create_decode_pipeline()
594 .layout = device->meta_state.resolve_compute.p_layout, in create_decode_pipeline()
598 radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in create_decode_pipeline()
604 mtx_unlock(&device->meta_state.mtx); in create_decode_pipeline()
608 mtx_unlock(&device->meta_state.mtx); in create_decode_pipeline()
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| D | radv_meta.c | 497 ret = radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size); in radv_load_meta_pipeline()
513 if (!device->meta_state.cache.modified) in radv_store_meta_pipeline()
517 radv_pipeline_cache_to_handle(&device->meta_state.cache), &size, in radv_store_meta_pipeline()
534 radv_pipeline_cache_to_handle(&device->meta_state.cache), &size, in radv_store_meta_pipeline()
553 memset(&device->meta_state, 0, sizeof(device->meta_state)); in radv_device_init_meta()
555 device->meta_state.alloc = (VkAllocationCallbacks){ in radv_device_init_meta()
562 device->meta_state.cache.alloc = device->meta_state.alloc; in radv_device_init_meta()
563 radv_pipeline_cache_init(&device->meta_state.cache, device); in radv_device_init_meta()
567 mtx_init(&device->meta_state.mtx, mtx_plain); in radv_device_init_meta()
676 mtx_destroy(&device->meta_state.mtx); in radv_device_init_meta()
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| D | radv_meta_fmask_expand.c | 104 VkPipeline pipeline = device->meta_state.fmask_expand.pipeline[samples_log2]; in radv_expand_fmask_image_inplace()
131 cmd_buffer->device->meta_state.fmask_expand.p_layout, 0, /* set */ in radv_expand_fmask_image_inplace()
172 struct radv_meta_state *state = &device->meta_state; in radv_device_finish_meta_fmask_expand_state()
188 struct radv_meta_state *state = &device->meta_state; in create_fmask_expand_pipeline()
219 struct radv_meta_state *state = &device->meta_state; in radv_device_init_meta_fmask_expand_state()
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| D | radv_acceleration_structure.c | 127 radix_sort_vk_get_memory_requirements(device->meta_state.accel_struct_build.radix_sort, in radv_GetAccelerationStructureBuildSizesKHR()
1889 struct radv_meta_state *state = &device->meta_state; in radv_device_finish_accel_struct_build_state()
1925 &device->meta_state.alloc, layout); in create_build_pipeline()
1947 radv_pipeline_cache_to_handle(&device->meta_state.cache), 1, in create_build_pipeline()
1948 &pipeline_info, &device->meta_state.alloc, pipeline); in create_build_pipeline()
1980 &device->meta_state.accel_struct_build.leaf_pipeline, in radv_device_init_accel_struct_build_state()
1981 &device->meta_state.accel_struct_build.leaf_p_layout); in radv_device_init_accel_struct_build_state()
1986 &device->meta_state.accel_struct_build.internal_pipeline, in radv_device_init_accel_struct_build_state()
1987 &device->meta_state.accel_struct_build.internal_p_layout); in radv_device_init_accel_struct_build_state()
1992 &device->meta_state.accel_struct_build.copy_pipeline, in radv_device_init_accel_struct_build_state()
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| D | radv_device_generated_commands.c | 913 radv_DestroyPipeline(radv_device_to_handle(device), device->meta_state.dgc_prepare.pipeline, in radv_device_finish_dgc_prepare_state()
914 &device->meta_state.alloc); in radv_device_finish_dgc_prepare_state()
916 device->meta_state.dgc_prepare.p_layout, &device->meta_state.alloc); in radv_device_finish_dgc_prepare_state()
918 device->meta_state.dgc_prepare.ds_layout, in radv_device_finish_dgc_prepare_state()
919 &device->meta_state.alloc); in radv_device_finish_dgc_prepare_state()
956 &device->meta_state.alloc, in radv_device_init_dgc_prepare_state()
957 &device->meta_state.dgc_prepare.ds_layout); in radv_device_init_dgc_prepare_state()
964 .pSetLayouts = &device->meta_state.dgc_prepare.ds_layout, in radv_device_init_dgc_prepare_state()
971 &device->meta_state.alloc, in radv_device_init_dgc_prepare_state()
972 &device->meta_state.dgc_prepare.p_layout); in radv_device_init_dgc_prepare_state()
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| D | radv_meta_copy_vrs_htile.c | 34 struct radv_meta_state *state = &device->meta_state; in radv_device_finish_meta_copy_vrs_htile_state()
144 struct radv_meta_state *state = &device->meta_state; in radv_device_init_meta_copy_vrs_htile_state()
217 struct radv_meta_state *state = &device->meta_state; in radv_copy_vrs_htile()
223 if (!cmd_buffer->device->meta_state.copy_vrs_htile_pipeline) { in radv_copy_vrs_htile()
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| D | radv_device.c | 3078 &device->meta_state.alloc, &image); in radv_device_init_vrs_state()
3090 &device->meta_state.alloc, &buffer); in radv_device_init_vrs_state()
3109 &device->meta_state.alloc, &mem); in radv_device_init_vrs_state()
3131 radv_FreeMemory(radv_device_to_handle(device), mem, &device->meta_state.alloc); in radv_device_init_vrs_state()
3133 radv_DestroyBuffer(radv_device_to_handle(device), buffer, &device->meta_state.alloc); in radv_device_init_vrs_state()
3135 radv_DestroyImage(radv_device_to_handle(device), image, &device->meta_state.alloc); in radv_device_init_vrs_state()
3147 &device->meta_state.alloc); in radv_device_finish_vrs_image()
3149 &device->meta_state.alloc); in radv_device_finish_vrs_image()
3151 &device->meta_state.alloc); in radv_device_finish_vrs_image()
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| D | radv_pipeline_cache.c | 529 if (device->physical_device->disk_cache && cache != &device->meta_state.cache) { in radv_pipeline_cache_insert_shaders()
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| D | radv_private.h | 807 struct radv_meta_state meta_state; member
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