| /third_party/openssl/crypto/ |
| D | mips_arch.h | 27 # define mflo(rd,rs,rt) dmulu rd,rs,rt macro
31 # define mflo(rd,rs,rt) mulu rd,rs,rt macro
36 # define mflo(rd,rs,rt) mflo rd macro
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| /third_party/libjpeg-turbo/simd/mips/ |
| D | jsimd_dspr2.S | 2963 mflo t0, $ac0
2991 mflo t0, $ac0
3019 mflo t0, $ac0
3047 mflo t0, $ac0
3073 mflo t0, $ac0
3094 mflo t0, $ac0
3105 mflo t4, $ac1
3210 mflo s4, $ac0
3211 mflo s5, $ac1
3277 mflo t5, $ac0
[all …]
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| /third_party/flutter/skia/third_party/externals/libjpeg-turbo/simd/mips/ |
| D | jsimd_dspr2.S | 2937 mflo t0, $ac0
2965 mflo t0, $ac0
2993 mflo t0, $ac0
3021 mflo t0, $ac0
3047 mflo t0, $ac0
3068 mflo t0, $ac0
3079 mflo t4, $ac1
3175 mflo s4, $ac0
3176 mflo s5, $ac1
3233 mflo t5, $ac0
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerMIPS32.h | 209 void mflo(const Operand *OpRd);
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| D | IceInstMIPS32.cpp | 852 Asm->mflo(getDest()); in emitIAS()
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| D | IceAssemblerMIPS32.cpp | 779 void AssemblerMIPS32::mflo(const Operand *OpRd) { in mflo() function in Ice::MIPS32::AssemblerMIPS32
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MicroMipsDSPInstrInfo.td | 140 class MFLO_MM_ENC : POOL32A_1RAC_FMT<"mflo", 0b01000001>;
347 class MFLO_MM_DESC : MFHI_MM_DESC_BASE<"mflo", ACC64DSPOpnd, MipsMFLO,
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| D | MipsSchedule.td | 243 def II_MFHI_MFLO : InstrItinClass; // mfhi and mflo
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| D | MipsScheduleP5600.td | 180 // clo, clz, di, ei, mfhi, mflo
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| D | Mips64InstrInfo.td | 335 def MFLO64 : MoveFromLOHI<"mflo", GPR64Opnd, AC0_64>, MFLO_FM<0x12>,
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| D | MicroMipsInstrInfo.td | 922 def MFLO_MM : MMRel, MoveFromLOHI<"mflo", GPR32Opnd, AC0>,
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| D | MipsDSPInstrInfo.td | 787 class MFLO_DESC : MFHI_DESC_BASE<"mflo", ACC64DSPOpnd, MipsMFLO, NoItinerary>;
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| D | MipsScheduleGeneric.td | 182 // mfhi, mflo, movn, mthi, mtlo, rdwhr
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| D | Mips16InstrInfo.td | 889 def Mflo16: FRR16_M_ins<0b10010, "mflo", IIM16Alu> {
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| D | MipsInstrInfo.td | 2348 def MFLO : MMRel, MoveFromLOHI<"mflo", GPR32Opnd, AC0>, MFLO_FM<0x12>,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenAsmMatcher.inc | 5042 "mfgc0\005mfhc0\005mfhc1\005mfhc2\006mfhgc0\004mfhi\006mfhi16\004mflo\006"
7020 { 6112 /* mflo */, Mips::Mflo16, Convert__Reg1_0, AMFBS_InMips16Mode, { MCK_CPU16Regs }, },
7021 …{ 6112 /* mflo */, Mips::MFLO, Convert__GPR32AsmReg1_0, AMFBS_HasStdEnc_NotMips32r6_NotMips64r6_No…
7022 …{ 6112 /* mflo */, Mips::MFLO_MM, Convert__GPR32AsmReg1_0, AMFBS_InMicroMips_NotMips32r6, { MCK_GP…
7023 …{ 6112 /* mflo */, Mips::MFLO_DSP_MM, Convert__GPR32AsmReg1_0__ACC64DSPAsmReg1_1, AMFBS_InMicroMip…
7024 …{ 6112 /* mflo */, Mips::MFLO_DSP, Convert__GPR32AsmReg1_0__ACC64DSPAsmReg1_1, AMFBS_HasDSP, { MCK…
10410 …{ 6112 /* mflo */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroM…
10411 { 6112 /* mflo */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_InMicroMips_NotMips32r6 },
10412 { 6112 /* mflo */, 2 /* 1 */, MCK_ACC64DSPAsmReg, AMFBS_InMicroMips_HasDSP },
10413 { 6112 /* mflo */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_InMicroMips_HasDSP },
[all …]
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