Searched refs:next_insn_offset (Results 1 – 9 of 9) sorted by relevance
/third_party/mesa3d/src/intel/compiler/ |
D | brw_eu.c | 363 *sz = p->next_insn_offset; in brw_get_program() 397 p->nr_insn -= (p->next_insn_offset - start_offset) / sizeof(brw_inst); in brw_try_override_assembly() 400 p->next_insn_offset = start_offset + sb.st_size; in brw_try_override_assembly() 402 p->store = (brw_inst *)reralloc_size(p->mem_ctx, p->store, p->next_insn_offset); in brw_try_override_assembly() 413 start_offset, p->next_insn_offset, in brw_try_override_assembly()
|
D | brw_fs_generator.cpp | 1774 int start_offset = p->next_insn_offset; in generate_code() 1786 unsigned int last_insn_offset = p->next_insn_offset; in generate_code() 1806 last_insn_offset = p->next_insn_offset; in generate_code() 1825 last_insn_offset = p->next_insn_offset; in generate_code() 1845 last_insn_offset = p->next_insn_offset; in generate_code() 1852 disasm_annotate(disasm_info, inst, p->next_insn_offset); in generate_code() 2517 assert(p->next_insn_offset == last_insn_offset + 16 || in generate_code() 2535 disasm_new_inst_group(disasm_info, p->next_insn_offset); in generate_code() 2553 p->next_insn_offset, in generate_code() 2556 int before_size = p->next_insn_offset - start_offset; in generate_code() [all …]
|
D | brw_eu_compact.c | 2496 (p->next_insn_offset - start_offset) / sizeof(brw_inst); in brw_compact_instructions() 2504 (p->next_insn_offset - start_offset) / sizeof(brw_compact_inst) + 1; in brw_compact_instructions() 2512 for (int src_offset = 0; src_offset < p->next_insn_offset - start_offset; in brw_compact_instructions() 2566 (p->next_insn_offset - start_offset) / sizeof(brw_inst); in brw_compact_instructions() 2569 p->next_insn_offset = start_offset + offset; in brw_compact_instructions() 2570 for (offset = 0; offset < p->next_insn_offset - start_offset; in brw_compact_instructions() 2656 if (p->next_insn_offset & sizeof(brw_compact_inst)) { in brw_compact_instructions() 2662 p->next_insn_offset += sizeof(brw_compact_inst); in brw_compact_instructions() 2664 p->nr_insn = p->next_insn_offset / sizeof(brw_inst); in brw_compact_instructions()
|
D | brw_vec4_generator.cpp | 1541 disasm_annotate(disasm_info, inst, p->next_insn_offset); in generate_code() 2207 disasm_new_inst_group(disasm_info, p->next_insn_offset); in generate_code() 2215 0, p->next_insn_offset, in generate_code() 2218 int before_size = p->next_insn_offset; in generate_code() 2220 int after_size = p->next_insn_offset; in generate_code() 2226 _mesa_sha1_compute(p->store, p->next_insn_offset, sha1); in generate_code() 2242 dump_assembly(p->store, 0, p->next_insn_offset, in generate_code()
|
D | brw_eu_emit.c | 667 assert(p->next_insn_offset == p->nr_insn * sizeof(brw_inst)); in brw_append_insns() 669 p->next_insn_offset = new_nr_insn * sizeof(brw_inst); in brw_append_insns() 2914 offset < p->next_insn_offset; in brw_find_next_block_end() 2964 offset < p->next_insn_offset; in brw_find_loop_end() 2992 for (offset = start_offset; offset < p->next_insn_offset; offset += 16) { in brw_set_uip_jip() 3696 p->next_insn_offset, 0); in brw_MOV_reloc_imm()
|
D | test_eu_validate.cpp | 108 disasm_new_inst_group(disasm, p->next_insn_offset); in validate() 112 p->next_insn_offset, disasm); in validate() 115 dump_assembly(p->store, 0, p->next_insn_offset, disasm, NULL); in validate() 131 p->next_insn_offset = 0; in clear_instructions()
|
D | brw_eu.h | 96 unsigned int next_insn_offset; member
|
/third_party/mesa3d/src/intel/tools/ |
D | i965_asm.c | 338 p->next_insn_offset, disasm_info); in main() 340 const int nr_insn = (p->next_insn_offset - start_offset) / 16; in main()
|
D | i965_gram.y | 333 label->offset = p->next_insn_offset; in add_label() 1502 label->offset = p->next_insn_offset;
|