| /third_party/mesa3d/src/broadcom/compiler/ |
| D | v3d_nir_lower_io.c | 162 nir_ssa_def *offset_reg = in v3d_nir_lower_vpm_output() local
182 v3d_nir_store_output(b, state->psiz_vpm_offset, offset_reg, src); in v3d_nir_lower_vpm_output()
236 offset_reg, nir_channel(b, src, i)); in v3d_nir_lower_vpm_output()
561 nir_ssa_def *offset_reg = in v3d_nir_emit_ff_vpm_outputs() local
575 offset_reg, state->pos[i]); in v3d_nir_emit_ff_vpm_outputs()
603 offset_reg, pos); in v3d_nir_emit_ff_vpm_outputs()
612 v3d_nir_store_output(b, state->zs_vpm_offset, offset_reg, z); in v3d_nir_emit_ff_vpm_outputs()
617 offset_reg, rcp_wc); in v3d_nir_emit_ff_vpm_outputs()
639 offset_reg, nir_imm_int(b, 0)); in v3d_nir_emit_ff_vpm_outputs()
|
| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_vec4_gs_nir.cpp | 46 const unsigned offset_reg = nir_src_as_uint(instr->src[1]); in nir_emit_intrinsic() local
54 instr->const_index[0] + offset_reg, in nir_emit_intrinsic()
|
| D | brw_vec4_nir.cpp | 461 src_reg offset_reg = retype(get_nir_src_imm(instr->src[2]), in nir_emit_intrinsic() local
508 emit_untyped_write(bld, surf_index, offset_reg, val_reg, in nir_emit_intrinsic()
521 src_reg offset_reg = retype(get_nir_src_imm(instr->src[1]), in nir_emit_intrinsic() local
528 src_reg read_result = emit_untyped_read(bld, surf_index, offset_reg, in nir_emit_intrinsic()
637 src_reg offset_reg; in nir_emit_intrinsic() local
641 offset_reg = brw_imm_ud(aligned_offset); in nir_emit_intrinsic()
662 offset_reg = src_reg(this, glsl_type::uint_type); in nir_emit_intrinsic()
663 emit(MOV(dst_reg(offset_reg), in nir_emit_intrinsic()
674 offset_reg, in nir_emit_intrinsic()
682 surf_index, offset_reg, NULL, NULL); in nir_emit_intrinsic()
[all …]
|
| D | brw_vec4_visitor.cpp | 735 src_reg offset_reg, in emit_pull_constant_load_reg() argument
747 grf_offset.type = offset_reg.type; in emit_pull_constant_load_reg()
749 pull = MOV(grf_offset, offset_reg); in emit_pull_constant_load_reg()
765 offset_reg); in emit_pull_constant_load_reg()
|
| /third_party/mesa3d/src/gallium/drivers/lima/ir/pp/ |
| D | codegen.h | 134 unsigned offset_reg : 6; member
281 unsigned offset_reg : 6; member
|
| D | disasm.c | 348 print_source_scalar(uniform->offset_reg, NULL, false, false, fp); in print_uniform()
701 print_source_scalar(temp_write->temp_write.offset_reg, in print_temp_write()
|
| D | codegen.c | 197 f->offset_reg = ppir_target_get_src_reg_index(&load->src); in ppir_codegen_encode_uniform()
605 f->temp_write.offset_reg = snode->index >> 2; in ppir_codegen_encode_store_temp()
|
| /third_party/mesa3d/src/panfrost/midgard/ |
| D | midgard_emit.c | 656 unsigned offset_reg = SSA_REG_FROM_FIXED(ins->src[3]); in texture_word_from_instr() local
659 (offset_reg & 1) << 1 | /* select */ in texture_word_from_instr()
|
| /third_party/pcre2/pcre2/src/sljit/ |
| D | sljitNativeARM_32.c | 1676 sljit_uw imm, offset_reg; in emit_op_mem() local
1697 offset_reg = OFFS_REG(arg); in emit_op_mem()
1702 …FAIL_IF(push_inst(compiler, ADD | RD(tmp_reg) | RN(arg) | RM(offset_reg) | ((sljit_uw)argw << 7))); in emit_op_mem()
1708 RM(offset_reg) | (is_type1_transfer ? (1 << 25) : 0) | ((sljit_uw)argw << 7))); in emit_op_mem()
|
| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_spill.c | 921 struct ir3_register *offset_reg = in reload() local
923 offset_reg->uim_val = spill_slot; in reload()
|
| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 1883 int offset_reg = ctx->gs_rotated_input[vtx_id / 3]; in fetch_gs_input() local
1890 if (offset_reg == ctx->gs_rotated_input[0] && offset_chan == 2) in fetch_gs_input()
1941 offset_reg = t2; in fetch_gs_input()
1962 offset_reg, offset_chan); in fetch_gs_input()
1965 offset_reg = t2; in fetch_gs_input()
1973 vtx.src_gpr = offset_reg; in fetch_gs_input()
3924 int offset_reg = i / 3; in r600_shader_from_tgsi() local
3929 if (offset_reg == 0 && offset_chan == 2) in r600_shader_from_tgsi()
3935 ctx.gs_rotated_input[offset_reg], offset_chan, in r600_shader_from_tgsi()
3937 offset_reg, offset_chan, in r600_shader_from_tgsi()
|