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Searched refs:op_addr (Results 1 – 1 of 1) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/
Dcachel1_armv7.h120 uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */; in SCB_InvalidateICache_by_Addr() local
125 …SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..… in SCB_InvalidateICache_by_Addr()
126 op_addr += __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
333 uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; in SCB_InvalidateDCache_by_Addr() local
338 …SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..… in SCB_InvalidateDCache_by_Addr()
339 op_addr += __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
363 uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; in SCB_CleanDCache_by_Addr() local
368 …SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..… in SCB_CleanDCache_by_Addr()
369 op_addr += __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
393 uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; in SCB_CleanInvalidateDCache_by_Addr() local
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