Searched refs:post_shuffle (Results 1 – 8 of 8) sorted by relevance
44 uint32_t post_shuffle; member
12436 bool post_shuffle = key->state.post_shuffle & (1u << loc); in select_vs_prolog() local12437 unsigned offset = vtx_info->chan_byte_size * (post_shuffle && j < 3 ? 2 - j : j); in select_vs_prolog()
115 ASSIGN_VS_STATE_FIELD(post_shuffle); in radv_aco_convert_vs_prolog_key()
153 unsigned *nfmt, bool *post_shuffle, in radv_translate_vertex_format() argument194 *post_shuffle = true; in radv_translate_vertex_format()197 *post_shuffle = false; in radv_translate_vertex_format()
387 uint32_t post_shuffle; member
3023 uint32_t post_shuffle : 1; member3152 if (state->post_shuffle & attribute_mask) { in lookup_vs_prolog()3153 header.post_shuffle = true; in lookup_vs_prolog()3154 key_words[key_size++] = state->post_shuffle & attribute_mask; in lookup_vs_prolog()3728 rsrc_word3 = vs_state->post_shuffle & (1u << i) ? DST_SEL_ZYXW : data_format_dst_sel[dfmt]; in radv_write_vertex_descriptors()6096 bool post_shuffle; in radv_CmdSetVertexInputEXT() local6103 &dfmt, &nfmt, &post_shuffle, &alpha_adjust); in radv_CmdSetVertexInputEXT()6110 found->post_shuffle = post_shuffle; in radv_CmdSetVertexInputEXT()6120 if (found->post_shuffle) in radv_CmdSetVertexInputEXT()6121 state->post_shuffle |= 1u << loc; in radv_CmdSetVertexInputEXT()
1534 bool post_shuffle; in radv_pipeline_init_vertex_input_info() local1543 &post_shuffle, &info.vertex_alpha_adjust[location]); in radv_pipeline_init_vertex_input_info()1579 if (post_shuffle) in radv_pipeline_init_vertex_input_info()4206 bool post_shuffle = pipeline_key->vs.vertex_post_shuffle & (1 << location); in radv_lower_vs_input() local4223 const unsigned *swizzle = post_shuffle ? swizzle_post_shuffle : swizzle_normal; in radv_lower_vs_input()4228 if (post_shuffle) { in radv_lower_vs_input()4239 unsigned idx = i + (post_shuffle ? component : 0); in radv_lower_vs_input()
1574 bool post_shuffle; member2325 unsigned *nfmt, bool *post_shuffle,