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Searched refs:push_reg_mask (Results 1 – 3 of 3) sorted by relevance

/third_party/mesa3d/src/intel/vulkan/
Danv_nir_compute_push_layout.c99 offsetof(struct anv_push_constants, push_reg_mask[nir->info.stage]); in anv_nir_compute_push_layout()
213 offsetof(struct anv_push_constants, push_reg_mask[nir->info.stage]); in anv_nir_compute_push_layout()
Danv_private.h2509 uint64_t push_reg_mask[MESA_SHADER_STAGES]; member
DgenX_cmd_buffer.c3332 push->push_reg_mask[stage] = 0; in cmd_buffer_flush_push_constants()
3349 push->push_reg_mask[stage] |= BITFIELD64_RANGE(range_start_reg, in cmd_buffer_flush_push_constants()