| /third_party/protobuf/objectivec/Tests/ |
| D | GPBExtensionRegistryTest.m | 62 GPBExtensionRegistry *reg1 = [[[GPBExtensionRegistry alloc] init] autorelease];
63 [reg1 addExtension:[UnittestRoot optionalInt32Extension]];
65 GPBExtensionRegistry *reg2 = [[reg1 copy] autorelease];
68 XCTAssertTrue([reg1 extensionForDescriptor:[TestAllExtensions descriptor] fieldNumber:1] ==
75 [reg1 addExtension:[UnittestRoot optionalBoolExtension]];
78 XCTAssertTrue([reg1 extensionForDescriptor:[TestAllExtensions descriptor] fieldNumber:13] ==
80 XCTAssertNil([reg1 extensionForDescriptor:[TestAllExtensions descriptor] fieldNumber:14]);
87 [reg1 addExtension:[UnittestRoot packedInt64Extension]];
90 XCTAssertTrue([reg1 extensionForDescriptor:[TestPackedExtensions descriptor] fieldNumber:91] ==
92 XCTAssertNil([reg1 extensionForDescriptor:[TestPackedExtensions descriptor] fieldNumber:94]);
[all …]
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| /third_party/openssl/crypto/aria/ |
| D | aria.c | 474 register uint32_t reg0, reg1, reg2, reg3; in ossl_aria_encrypt() local
490 reg1 = GET_U32_BE(in, 1); in ossl_aria_encrypt()
494 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
497 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
498 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
502 ARIA_SUBST_DIFF_EVEN(reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
503 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
506 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
507 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
516 reg1 = rk->u[1] ^ MAKE_U32( in ossl_aria_encrypt()
[all …]
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| /third_party/openssl/crypto/perlasm/ |
| D | x86gas.pl | 77 { my($addr,$reg1,$reg2,$idx)=@_;
80 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
86 $reg1 = "%$reg1" if ($reg1);
93 $ret .= "($reg1,$reg2,$idx)";
95 elsif ($reg1)
96 { $ret .= "($reg1)"; }
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| D | x86nasm.pl | 43 { my($size,$addr,$reg1,$reg2,$idx)=@_;
46 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
69 $ret .= "+$reg1" if ($reg1 ne "");
72 { $ret .= "$reg1"; }
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| D | x86masm.pl | 46 { my($size,$addr,$reg1,$reg2,$idx)=@_;
49 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
68 $ret .= "+$reg1" if ($reg1 ne "");
71 { $ret .= "$reg1"; }
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| /third_party/elfutils/tests/ |
| D | run-dwarfcfi.sh | 39 reg1: undefined
56 reg1: undefined
73 reg1: location expression: call_frame_cfa stack_value
90 reg1: location expression: call_frame_cfa stack_value
107 reg1: undefined
124 reg1: undefined
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| D | run-readelf-loc.sh | 341 [ 0] reg1
365 [ 0] reg1
481 [ 0] reg1
500 [ 0] reg1
699 [ 0] reg1
721 [ 0] reg1
845 [ 0] reg1
864 [ 0] reg1
1060 [ 0] reg1
1071 [ 0] reg1
|
| /third_party/ffmpeg/libavcodec/mips/ |
| D | vp9_idct_msa.c | 67 #define VP9_DOTP_CONST_PAIR(reg0, reg1, cnst0, cnst1, out0, out1) \ argument
75 ILVRL_H2_SW((-reg1), reg0, s1_m, s0_m); \
76 ILVRL_H2_SW(reg0, reg1, s3_m, s2_m); \
968 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; in vp9_idct16_1d_columns_addblk_msa() local
974 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, in vp9_idct16_1d_columns_addblk_msa()
999 VP9_DOTP_CONST_PAIR(reg1, reg15, cospi_30_64, cospi_2_64, reg1, reg15); in vp9_idct16_1d_columns_addblk_msa()
1002 reg9 = reg1 - loc2; in vp9_idct16_1d_columns_addblk_msa()
1003 reg1 = reg1 + loc2; in vp9_idct16_1d_columns_addblk_msa()
1016 loc1 = reg1 + reg13; in vp9_idct16_1d_columns_addblk_msa()
1017 reg13 = reg1 - reg13; in vp9_idct16_1d_columns_addblk_msa()
[all …]
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| /third_party/ffmpeg/libavutil/mips/ |
| D | mmiutils.h | 101 #define MMI_LQ(reg1, reg2, addr, bias) \ argument
102 "ld "#reg1", "#bias"("#addr") \n\t" \
105 #define MMI_SQ(reg1, reg2, addr, bias) \ argument
106 "sd "#reg1", "#bias"("#addr") \n\t" \
192 #define MMI_LQ(reg1, reg2, addr, bias) \ argument
193 "gslq "#reg1", "#reg2", "#bias"("#addr") \n\t"
195 #define MMI_SQ(reg1, reg2, addr, bias) \ argument
196 "gssq "#reg1", "#reg2", "#bias"("#addr") \n\t"
|
| /third_party/mesa3d/src/gallium/drivers/r600/sfn/tests/ |
| D | sfn_value_test.cpp | 100 UniformValue reg1(513, 2, 1); in TEST_F() local
102 EXPECT_EQ(reg1.sel(), 513); in TEST_F()
103 EXPECT_EQ(reg1.chan(), 2); in TEST_F()
104 EXPECT_EQ(reg1.kcache_bank(), 1); in TEST_F()
105 EXPECT_FALSE(reg1.buf_addr()); in TEST_F()
106 EXPECT_FALSE(reg1.is_virtual()); in TEST_F()
|
| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_fs_bank_conflicts.cpp | 416 for (unsigned reg1 = reg + 1; reg1 <= max_reg; reg1++) { in require_contiguous() local
417 if (offsets[atoms[reg1]] < reg + n) { in require_contiguous()
418 atoms[reg1] = r; in require_contiguous()
420 if (offsets[atoms[reg1 - 1]] != offsets[atoms[reg1]]) in require_contiguous()
423 offsets[r] = offsets[atoms[reg1]]; in require_contiguous()
424 atoms[reg1] = r; in require_contiguous()
|
| /third_party/ffmpeg/libavcodec/aarch64/ |
| D | vp9mc_16bpp_neon.S | 326 .macro do_store4 reg1, reg2, reg3, reg4, tmp1, tmp2, tmp3, tmp4, minreg, type
327 sqrshrun \reg1\().4h, \reg1\().4s, #7
337 umin \reg1\().4h, \reg1\().4h, \minreg\().4h
342 urhadd \reg1\().4h, \reg1\().4h, \tmp1\().4h
347 st1 {\reg1\().4h}, [x0], x1
355 .macro do_store8 reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, minreg, type
356 sqrshrun \reg1\().4h, \reg1\().4s, #7
357 sqrshrun2 \reg1\().8h, \reg2\().4s, #7
370 umin \reg1\().8h, \reg1\().8h, \minreg\().8h
375 urhadd \reg1\().8h, \reg1\().8h, \reg5\().8h
[all …]
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| D | vp9mc_neon.S | 389 .macro do_store4 reg1, reg2, tmp1, tmp2, type
390 sqrshrun \reg1\().8b, \reg1\().8h, #7
397 urhadd \reg1\().8b, \reg1\().8b, \tmp1\().8b
400 st1 {\reg1\().s}[0], [x0], x1
402 st1 {\reg1\().s}[1], [x0], x1
407 .macro do_store reg1, reg2, reg3, reg4, tmp1, tmp2, tmp3, tmp4, type
408 sqrshrun \reg1\().8b, \reg1\().8h, #7
417 urhadd \reg1\().8b, \reg1\().8b, \tmp1\().8b
422 st1 {\reg1\().8b}, [x0], x1
|
| /third_party/ffmpeg/tests/checkasm/aarch64/ |
| D | checkasm.S | 151 .macro check_reg_neon reg1, reg2
153 uzp1 v2.2d, v\reg1\().2d, v\reg2\().2d
164 .macro check_reg reg1, reg2
166 eor x0, x0, \reg1
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| D | disassemble.c | 59 return regs.reg0 | ((regs.reg1 & 0x1) << 5); in get_reg0()
61 return regs.reg0 <= regs.reg1 ? regs.reg0 : 63 - regs.reg0; in get_reg0()
66 return regs.reg0 <= regs.reg1 ? regs.reg1 : 63 - regs.reg1; in get_reg1()
141 ctrl = regs.reg1 >> 2; in DecodeRegCtrl()
142 decoded.read_reg0 = !(regs.reg1 & 0x2); in DecodeRegCtrl()
|
| /third_party/mesa3d/src/util/ |
| D | register_allocate.c | 133 struct ra_reg *reg1 = ®s->regs[r1]; in ra_add_conflict_list() local
135 if (reg1->conflict_list.mem_ctx) { in ra_add_conflict_list()
136 util_dynarray_append(®1->conflict_list, unsigned int, r2); in ra_add_conflict_list()
138 BITSET_SET(reg1->conflicts, r2); in ra_add_conflict_list()
179 unsigned int base_reg, unsigned int reg0, unsigned int reg1) in ra_add_transitive_reg_pair_conflict() argument
182 ra_add_reg_conflict(regs, reg1, base_reg); in ra_add_transitive_reg_pair_conflict()
186 if (conflict != reg1) in ra_add_transitive_reg_pair_conflict()
189 ra_add_reg_conflict(regs, reg1, conflict); in ra_add_transitive_reg_pair_conflict()
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| /third_party/mesa3d/src/freedreno/decode/ |
| D | crashdec-mempool.c | 57 uint32_t reg1 : 18; in dump_mem_pool_chunk() member
73 dump_mem_pool_reg_write(fields.reg1, fields.data1, fields.reg1_context, in dump_mem_pool_chunk()
|
| /third_party/libabigail/tests/data/test-abidiff-exit/ |
| D | test-decl-enum-v0.c | 4 void reg1(const enum embodied_enum * foo) { (void)foo; } in reg1() function
|
| D | test-decl-enum-v1.c | 4 void reg1(const enum embodied_enum * foo) { (void)foo; } in reg1() function
|
| D | test-decl-struct-v0.c | 4 void reg1(const struct embodied * foo) { (void)foo; } in reg1() function
|
| D | test-decl-struct-v1.c | 4 void reg1(const struct embodied * foo) { (void)foo; } in reg1() function
|
| D | test-member-size-v0.cc | 25 void reg1(S*, T*, T*) { } in reg1() function
|
| D | test-member-size-v1.cc | 26 void reg1(S*, T*, T*) { } in reg1() function
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 149 bool haveSameParity(unsigned reg1, unsigned reg2) { in haveSameParity() argument
150 assert(isFPReg(reg1) && "Expecting an FP register for reg1"); in haveSameParity()
153 return isOdd(reg1) == isOdd(reg2); in haveSameParity()
|
| /third_party/ffmpeg/tests/checkasm/arm/ |
| D | checkasm.S | 147 .macro check_reg reg1, reg2=
149 eors r2, r2, \reg1
|