Searched refs:reg64 (Results 1 – 6 of 6) sorted by relevance
| /third_party/elfutils/libcpu/defs/ |
| D | i386 | 14 %mask {reg64} 3
98 `01100011,{mod}{reg64}{r_m}:movslq {mod}{r_m},{reg64}
421 00001111,00100000,11{ccc}{reg64}:mov {ccc},{reg64}
422 00001111,00100010,11{ccc}{reg64}:mov {reg64},{ccc}
423 00001111,00100001,11{ddd}{reg64}:mov {ddd},{reg64}
424 00001111,00100011,11{ddd}{reg64}:mov {reg64},{ddd}
456 `10001111,11000{reg64}:pop {reg64}
465 `11111111,11110{reg64}:push {reg64}
472 `01010{reg64}:push {reg64}
473 01011{reg64}:pop {reg64}
[all …]
|
| /third_party/libbpf/src/ |
| D | usdt.c | 1184 #define reg_off(reg64, reg32) offsetof(struct pt_regs, reg64) in calc_pt_regs_off() argument
1186 #define reg_off(reg64, reg32) offsetof(struct pt_regs, reg32) in calc_pt_regs_off()
|
| /third_party/mesa3d/src/freedreno/registers/ |
| D | rules-ng-ng.txt | 147 <reg8>, <reg16>, <reg32> or <reg64> tags. The register of course takes
488 <reg64 offset="0x70" name="TRAPPED_OPCODE" />
628 <reg64 offset="0x70" name="TRAPPED_OPCODE" />
|
| /third_party/elfutils/tests/ |
| D | run-addrcfi.sh | 192 control reg64 (%mxcsr): undefined
258 control reg64 (%mxcsr): undefined
366 integer reg64 (cr): undefined
1388 integer reg64 (cr): undefined
2416 integer reg64 (cr): undefined
3442 control reg64 (%pswm): undefined
3519 control reg64 (%pswm): undefined
3642 FP/SIMD reg64 (v0): undefined
3745 control reg64 (%mxcsr): undefined
|
| /third_party/mesa3d/docs/relnotes/ |
| D | 21.1.0.rst | 2897 - freedreno/a6xx: always use reg64 for address registers (no LO/HI)
|
| D | 22.2.0.rst | 5331 - freedreno/registers/a6xx: Some reg64 conversion
|