Home
last modified time | relevance | path

Searched refs:reg_ (Results 1 – 8 of 8) sorted by relevance

/third_party/mesa3d/src/amd/compiler/
Daco_ir.h491 : reg_(PhysReg{128}), isTemp_(false), isFixed_(true), isConstant_(false), isKill_(false), in Operand()
764 constexpr PhysReg physReg() const noexcept { return reg_; } in physReg()
769 reg_ = reg; in setFixed()
774 constexpr bool isLiteral() const noexcept { return isConstant() && reg_ == 255; } in isLiteral()
788 if (reg_ <= 192) in constantValue64()
789 return reg_ - 128; in constantValue64()
790 else if (reg_ <= 208) in constantValue64()
791 return 0xFFFFFFFFFFFFFFFF - (reg_ - 193); in constantValue64()
793 switch (reg_) { in constantValue64()
894 PhysReg reg_; variable
[all …]
Daco_register_allocation.cpp60 assignment(PhysReg reg_, RegClass rc_) : reg(reg_), rc(rc_), assigned(-1) {} in assignment()
/third_party/flutter/skia/tools/fiddle/
Dexamples.h37 sk_tools::Registry<fiddle::Example> reg_##NAME( \
/third_party/ffmpeg/libavcodec/x86/
Dvp9lpf_16bpp.asm49 %define reg_%4 m%2
54 %define reg_%4 [%3]
66 %undef reg_%4
74 %define reg_%3 m%1
77 %define reg_%3 [%2]
148 pand %1, reg_%3 ; apply mask
Dvp9itxfm_16bpp.asm458 %define reg_%4 m%2
463 %define reg_%4 [%3]
475 %undef reg_%4
483 %define reg_%3 m%1
486 %define reg_%3 [%2]
Dvp9intrapred_16bpp.asm53 %define reg_%4 m%2
58 %define reg_%4 [%3]
70 %undef reg_%4
78 %define reg_%3 m%1
81 %define reg_%3 [%2]
/third_party/skia/tools/fiddle/
Dexamples.h45 sk_tools::Registry<fiddle::Example> reg_##NAME( \
/third_party/elfutils/libdw/
Dcfi.c124 fs->regs[regno].rule = reg_##r_rule; \ in execute_cfi()