Home
last modified time | relevance | path

Searched refs:reg_map (Results 1 – 17 of 17) sorted by relevance

/third_party/pcre2/pcre2/src/sljit/
DsljitNativeX86_64.c40 *inst++ = REX_W | ((reg_map[reg] <= 7) ? 0 : REX_B); in emit_load_imm64()
41 *inst++ = U8(MOV_r_i32 | (reg_map[reg] & 0x7)); in emit_load_imm64()
120 if (reg_map[b & REG_MASK] >= 8) in emit_x86_instruction()
135 if (reg_map[OFFS_REG(b)] >= 8) in emit_x86_instruction()
141 if (reg_map[b] >= 8) in emit_x86_instruction()
172 if (reg_map[a] >= 8) in emit_x86_instruction()
285 SLJIT_ASSERT(reg_map[TMP_REG2] >= 8); in generate_far_jump_code()
392 size = reg_map[i] >= 8 ? 2 : 1; in sljit_emit_enter()
396 if (reg_map[i] >= 8) in sljit_emit_enter()
402 size = reg_map[i] >= 8 ? 2 : 1; in sljit_emit_enter()
[all …]
DsljitNativeX86_32.c90 else if (reg_map[b & REG_MASK] == 5) in emit_x86_instruction()
147 *buf_ptr = U8(reg_map[a] << 3); in emit_x86_instruction()
163 *buf_ptr = U8(*buf_ptr | MOD_REG | (!(flags & EX86_SSE2_OP2) ? reg_map[b] : b)); in emit_x86_instruction()
166 reg_map_b = reg_map[b & REG_MASK]; in emit_x86_instruction()
180 *buf_ptr++ = U8(reg_map_b | (reg_map[OFFS_REG(b)] << 3)); in emit_x86_instruction()
194 *buf_ptr++ = U8(reg_map_b | (reg_map[OFFS_REG(b)] << 3) | (immb << 6)); in emit_x86_instruction()
348 PUSH_REG(reg_map[TMP_REG1]); in sljit_emit_enter()
350 PUSH_REG(reg_map[SLJIT_S2]); in sljit_emit_enter()
352 PUSH_REG(reg_map[SLJIT_S1]); in sljit_emit_enter()
354 PUSH_REG(reg_map[SLJIT_S0]); in sljit_emit_enter()
[all …]
DsljitNativeX86_common.c75 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 3] = { variable
100 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 4] = { variable
109 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 4] = { variable
783 *inst++ = REX_W | (reg_map[reg] <= 7 ? 0 : REX_B); in emit_rdssp()
787 *inst = (0x3 << 6) | (0x1 << 3) | (reg_map[reg] & 0x7); in emit_rdssp()
807 *inst++ = REX_W | (reg_map[reg] <= 7 ? 0 : REX_B); in emit_incssp()
811 *inst = (0x3 << 6) | (0x5 << 3) | (reg_map[reg] & 0x7); in emit_incssp()
840 SLJIT_ASSERT(reg_map[TMP_REG1] == 5); in adjust_shadow_stack()
912 return emit_do_imm(compiler, MOV_r_i32 | reg_map[dst], srcw); in emit_mov()
919 …return emit_do_imm32(compiler, (reg_map[dst] >= 8) ? REX_B : 0, U8(MOV_r_i32 | reg_lmap[dst]), src… in emit_mov()
[all …]
DsljitNativeARM_T2_32.c48 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
62 #define RD3(rd) ((sljit_ins)reg_map[rd])
63 #define RN3(rn) ((sljit_ins)reg_map[rn] << 3)
64 #define RM3(rm) ((sljit_ins)reg_map[rm] << 6)
65 #define RDN3(rdn) ((sljit_ins)reg_map[rdn] << 8)
71 …(((sljit_ins)reg_map[rn] << 3) | ((sljit_ins)reg_map[rd] & 0x7) | (((sljit_ins)reg_map[rd] & 0x8) …
73 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
75 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
78 #define RD4(rd) ((sljit_ins)reg_map[rd] << 8)
79 #define RN4(rn) ((sljit_ins)reg_map[rn] << 16)
[all …]
DsljitNativeARM_32.c63 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
71 #define RM(rm) ((sljit_uw)reg_map[rm])
72 #define RM8(rm) ((sljit_uw)reg_map[rm] << 8)
73 #define RD(rd) ((sljit_uw)reg_map[rd] << 12)
74 #define RN(rn) ((sljit_uw)reg_map[rn] << 16)
282 SLJIT_ASSERT(reg_map[TMP_REG1] != 14); in emit_blx()
1069 imm |= (sljit_uw)1 << reg_map[i]; in sljit_emit_enter()
1072 imm |= (sljit_uw)1 << reg_map[i]; in sljit_emit_enter()
1074 SLJIT_ASSERT(reg_map[TMP_REG2] == 14); in sljit_emit_enter()
1247 SLJIT_ASSERT(reg_map[TMP_REG2] == 14); in emit_stack_frame_release()
[all …]
DsljitNativeARM_64.c46 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 8] = { variable
55 #define RD(rd) ((sljit_ins)reg_map[rd])
56 #define RT(rt) ((sljit_ins)reg_map[rt])
57 #define RN(rn) ((sljit_ins)reg_map[rn] << 5)
58 #define RT2(rt2) ((sljit_ins)reg_map[rt2] << 10)
59 #define RM(rm) ((sljit_ins)reg_map[rm] << 16)
1423 SLJIT_ASSERT(reg_map[1] == 0 && reg_map[3] == 2 && reg_map[5] == 4); in sljit_emit_op_src()
1445 return reg_map[reg]; in sljit_get_register_index()
DsljitNativeSPARC_common.c100 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
112 #define D(d) ((sljit_ins)reg_map[d] << 25)
116 #define S1(s1) ((sljit_ins)reg_map[s1] << 14)
119 #define S2(s2) ((sljit_ins)reg_map[s2])
127 #define DR(dr) (reg_map[dr])
128 #define DRF(dr, flags) ((sljit_s32)(reg_map[dr] | ((flags) & SET_FLAGS)))
1118 return reg_map[reg]; in sljit_get_register_index()
DsljitNativePPC_common.c107 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 7] = { variable
118 #define D(d) ((sljit_ins)reg_map[d] << 21)
119 #define S(s) ((sljit_ins)reg_map[s] << 21)
120 #define A(a) ((sljit_ins)reg_map[a] << 16)
121 #define B(b) ((sljit_ins)reg_map[b] << 11)
122 #define C(c) ((sljit_ins)reg_map[c] << 6)
1709 return reg_map[reg]; in sljit_get_register_index()
DsljitNativeMIPS_common.c82 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
104 #define S(s) ((sljit_ins)reg_map[s] << 21)
105 #define T(t) ((sljit_ins)reg_map[t] << 16)
106 #define D(d) ((sljit_ins)reg_map[d] << 11)
117 #define DR(dr) (reg_map[dr])
1707 return reg_map[reg]; in sljit_get_register_index()
DsljitNativeSPARC_32.c153 reg = reg_map[*src & REG_MASK]; in call_with_args()
DsljitNativeS390X.c50 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 4] = { variable
128 #define R0(r) ((sljit_ins)reg_map[r])
143 SLJIT_ASSERT(r >= 0 && r < (sljit_s32)(sizeof(reg_map) / sizeof(reg_map[0]))); in gpr()
144 return reg_map[r]; in gpr()
DsljitNativeMIPS_32.c455 SLJIT_ASSERT(reg_map[TMP_REG1] == 4 && freg_map[TMP_FREG1] == 12); in call_with_args()
DsljitNativeMIPS_64.c575 SLJIT_ASSERT(reg_map[TMP_REG1] == 4 && freg_map[TMP_FREG1] == 12); in call_with_args()
/third_party/mesa3d/src/etnaviv/drm-shim/
Detnaviv_noop.c39 const uint64_t *reg_map; member
45 .reg_map = (const uint64_t[]){
72 .reg_map = (const uint64_t[]){
99 .reg_map = (const uint64_t[]){
126 .reg_map = (const uint64_t[]){
198 gp->value = shim_gpu->reg_map[gp->param]; in etnaviv_ioctl_get_param()
/third_party/mesa3d/src/compiler/nir/
Dnir_schedule.c132 struct hash_table *reg_map; member
246 struct hash_entry *entry = _mesa_hash_table_search(state->reg_map, in nir_schedule_reg_src_deps()
273 struct hash_entry *entry = _mesa_hash_table_search(state->reg_map, in nir_schedule_reg_dest_deps()
276 _mesa_hash_table_insert(state->reg_map, dest->reg.reg, dest_n); in nir_schedule_reg_dest_deps()
315 ralloc(state->reg_map, struct nir_schedule_class_dep); in nir_schedule_get_class_dep()
515 .reg_map = _mesa_pointer_hash_table_create(NULL), in calculate_forward_deps()
524 ralloc_free(state.reg_map); in calculate_forward_deps()
533 .reg_map = _mesa_pointer_hash_table_create(NULL), in calculate_reverse_deps()
542 ralloc_free(state.reg_map); in calculate_reverse_deps()
/third_party/mesa3d/src/broadcom/simulator/
Dv3dx_simulator.c249 static const uint32_t reg_map[] = { in v3dX() local
277 if (args->param < ARRAY_SIZE(reg_map) && reg_map[args->param]) { in v3dX()
278 args->value = V3D_READ(reg_map[args->param]); in v3dX()
/third_party/libbpf/src/
Dusdt.c1182 } reg_map[] = { in calc_pt_regs_off() local
1211 for (i = 0; i < ARRAY_SIZE(reg_map); i++) { in calc_pt_regs_off()
1212 for (j = 0; j < ARRAY_SIZE(reg_map[i].names); j++) { in calc_pt_regs_off()
1213 if (strcmp(reg_name, reg_map[i].names[j]) == 0) in calc_pt_regs_off()
1214 return reg_map[i].pt_regs_off; in calc_pt_regs_off()
1415 } reg_map[] = { in calc_pt_regs_off() local
1450 for (i = 0; i < ARRAY_SIZE(reg_map); i++) { in calc_pt_regs_off()
1451 if (strcmp(reg_name, reg_map[i].name) == 0) in calc_pt_regs_off()
1452 return reg_map[i].pt_regs_off; in calc_pt_regs_off()