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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrVIS.td20 (outs RC:$rd), (ins RC:$rs1, RC:$rs2),
21 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>;
26 (outs I64Regs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
27 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>;
30 let rd = 0, rs1 = 0, rs2 = 0 in
35 let rs2 = 0 in
41 // For VIS Instructions with only rs2, rd operands.
45 (outs RC:$rd), (ins RC:$rs2),
46 !strconcat(OpcStr, " $rs2, $rd"), []>;
49 let Constraints = "$rd = $f", rs1 = 0, rs2 = 0 in
[all …]
DSparcInstrAliases.td14 // mov<cond> <ccreg> rs2, rd
19 // mov<cond> (%icc|%xcc), rs2, rd
21 ", $rs2, $rd"),
22 (movrr IntRegs:$rd, IntRegs:$rs2, condVal)>;
29 // fmovs<cond> (%icc|%xcc), $rs2, $rd
31 ", $rs2, $rd"),
32 (fmovs FPRegs:$rd, FPRegs:$rs2, condVal)>;
34 // fmovd<cond> (%icc|%xcc), $rs2, $rd
36 ", $rs2, $rd"),
37 (fmovd DFPRegs:$rd, DFPRegs:$rs2, condVal)>;
[all …]
DSparcInstrInfo.td312 (outs RC:$rd), (ins RC:$rs1, RC:$rs2),
313 !strconcat(OpcStr, " $rs1, $rs2, $rd"),
314 [(set Ty:$rd, (OpNode Ty:$rs1, Ty:$rs2))],
327 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
328 !strconcat(OpcStr, " $rs1, $rs2, $rd"), [],
436 let rd = 0, rs1 = 0, rs2 = 0 in
652 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
653 "andn $rs1, $rs2, $rd",
654 [(set i32:$rd, (and i32:$rs1, (not i32:$rs2)))]>;
662 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
[all …]
DSparcInstr64Bit.td166 (ins I64Regs:$rs1, I64Regs:$rs2, TLSSym:$sym),
167 "add $rs1, $rs2, $rd, $sym",
169 (tlsadd i64:$rs1, i64:$rs2, tglobaltlsaddr:$sym))]>;
192 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
193 "mulx $rs1, $rs2, $rd",
194 [(set i64:$rd, (mul i64:$rs1, i64:$rs2))]>;
203 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
204 "sdivx $rs1, $rs2, $rd",
205 [(set i64:$rd, (sdiv i64:$rs1, i64:$rs2))]>;
212 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
[all …]
DSparcInstrFormats.td127 bits<5> rs2;
134 let Inst{4-0} = rs2;
159 bits<5> rs2;
165 let Inst{4-0} = rs2;
172 bits<5> rs2;
179 let Inst{4-0} = rs2;
186 bits<5> rs2;
192 let Inst{4-0} = rs2;
195 // Shift by register rs2.
200 bits<5> rs2;
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoD.td35 (ins FPR64:$rs1, FPR64:$rs2, FPR64:$rs3, frmarg:$funct3),
36 opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
39 : InstAlias<OpcodeStr#" $rd, $rs1, $rs2, $rs3",
40 (Inst FPR64:$rd, FPR64:$rs1, FPR64:$rs2, FPR64:$rs3, 0b111)>;
45 (ins FPR64:$rs1, FPR64:$rs2), opcodestr, "$rd, $rs1, $rs2">,
51 (ins FPR64:$rs1, FPR64:$rs2, frmarg:$funct3), opcodestr,
52 "$rd, $rs1, $rs2, $funct3">,
56 : InstAlias<OpcodeStr#" $rd, $rs1, $rs2",
57 (Inst FPR64:$rd, FPR64:$rs1, FPR64:$rs2, 0b111)>;
62 (ins FPR64:$rs1, FPR64:$rs2), opcodestr, "$rd, $rs1, $rs2">,
[all …]
DRISCVInstrInfoF.td53 (ins FPR32:$rs1, FPR32:$rs2, FPR32:$rs3, frmarg:$funct3),
54 opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
57 : InstAlias<OpcodeStr#" $rd, $rs1, $rs2, $rs3",
58 (Inst FPR32:$rd, FPR32:$rs1, FPR32:$rs2, FPR32:$rs3, 0b111)>;
63 (ins FPR32:$rs1, FPR32:$rs2), opcodestr, "$rd, $rs1, $rs2">,
69 (ins FPR32:$rs1, FPR32:$rs2, frmarg:$funct3), opcodestr,
70 "$rd, $rs1, $rs2, $funct3">;
73 : InstAlias<OpcodeStr#" $rd, $rs1, $rs2",
74 (Inst FPR32:$rd, FPR32:$rs1, FPR32:$rs2, 0b111)>;
97 (ins FPR32:$rs1, FPR32:$rs2), opcodestr, "$rd, $rs1, $rs2">,
[all …]
DRISCVInstrInfoC.td226 : RVInst16CSS<funct3, 0b10, (outs), (ins cls:$rs2, SP:$rs1, opnd:$imm),
227 OpcodeStr, "$rs2, ${imm}(${rs1})">;
238 : RVInst16CS<funct3, 0b00, (outs), (ins cls:$rs2, GPRC:$rs1, opnd:$imm),
239 OpcodeStr, "$rs2, ${imm}(${rs1})">;
269 : RVInst16CA<funct6, funct2, 0b01, (outs cls:$rd_wb), (ins cls:$rd, cls:$rs2),
270 OpcodeStr, "$rd, $rs2"> {
519 let rs2 = 0;
523 def C_MV : RVInst16CR<0b1000, 0b10, (outs GPRNoX0:$rs1), (ins GPRNoX0:$rs2),
524 "c.mv", "$rs1, $rs2">,
527 let rs1 = 0, rs2 = 0, hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
[all …]
DRISCVInstrInfoM.td74 def : Pat<(sext_inreg (mul GPR:$rs1, GPR:$rs2), i32),
75 (MULW GPR:$rs1, GPR:$rs2)>;
84 def : Pat<(zexti32 (riscv_divuw (zexti32 GPR:$rs1), (zexti32 GPR:$rs2))),
85 (DIVU GPR:$rs1, GPR:$rs2)>;
86 def : Pat<(zexti32 (riscv_remuw (zexti32 GPR:$rs1), (zexti32 GPR:$rs2))),
87 (REMU GPR:$rs1, GPR:$rs2)>;
92 def : Pat<(srem (sexti32 GPR:$rs1), (sexti32 GPR:$rs2)),
93 (REMW GPR:$rs1, GPR:$rs2)>;
95 (sexti32 GPR:$rs2)), i32),
96 (REMW GPR:$rs1, GPR:$rs2)>;
DRISCVInstrInfo.td300 (ins GPR:$rs1, GPR:$rs2, simm13_lsb0:$imm12),
301 opcodestr, "$rs1, $rs2, $imm12">,
318 (ins GPR:$rs2, GPR:$rs1, simm12:$imm12),
319 opcodestr, "$rs2, ${imm12}(${rs1})">;
336 : RVInstR<funct7, funct3, OPC_OP, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2),
337 opcodestr, "$rd, $rs1, $rs2">;
360 (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2">;
364 : RVInstR<funct7, 0b000, OPC_SYSTEM, (outs), (ins GPR:$rs1, GPR:$rs2),
530 let rs2 = 0b00010;
536 let rs2 = 0b00010;
[all …]
DRISCVInstrFormats.td148 bits<5> rs2;
153 let Inst{24-20} = rs2;
164 bits<5> rs2;
171 let Inst{24-20} = rs2;
182 bits<5> rs2;
189 let Inst{24-20} = rs2;
199 bits<5> rs2;
205 let Inst{24-20} = rs2;
264 bits<5> rs2;
268 let Inst{24-20} = rs2;
[all …]
DRISCVInstrFormatsC.td40 bits<5> rs2;
44 let Inst{6-2} = rs2;
71 bits<5> rs2;
75 let Inst{6-2} = rs2;
111 bits<3> rs2;
116 let Inst{4-2} = rs2;
123 bits<3> rs2;
129 let Inst{4-2} = rs2;
DRISCVInstrInfoA.td41 let rs2 = 0;
54 (outs GPR:$rd), (ins GPRMemAtomic:$rs1, GPR:$rs2),
55 opcodestr, "$rd, $rs2, $rs1">;
65 def : Pat<(StoreOp GPR:$rs1, StTy:$rs2), (Inst StTy:$rs2, GPR:$rs1, 0)>;
66 def : Pat<(StoreOp AddrFI:$rs1, StTy:$rs2), (Inst StTy:$rs2, AddrFI:$rs1, 0)>;
67 def : Pat<(StoreOp (add GPR:$rs1, simm12:$imm12), StTy:$rs2),
68 (Inst StTy:$rs2, GPR:$rs1, simm12:$imm12)>;
69 def : Pat<(StoreOp (add AddrFI:$rs1, simm12:$imm12), StTy:$rs2),
70 (Inst StTy:$rs2, AddrFI:$rs1, simm12:$imm12)>;
71 def : Pat<(StoreOp (IsOrAdd AddrFI:$rs1, simm12:$imm12), StTy:$rs2),
[all …]
/third_party/elfutils/libcpu/
Driscv_disasm.c182 uint16_t rs2; in riscv_disasm() local
406 rs2 = (first >> 2) & 0x1f; in riscv_disasm()
410 if (rs2 == 0) in riscv_disasm()
424 op[1] = REG (rs2); in riscv_disasm()
429 if (rs2 == 0) in riscv_disasm()
442 op[2] = REG (rs2); in riscv_disasm()
550 uint32_t rs2; in riscv_disasm() local
682 rs2 = (word >> 20) & 0x1f; in riscv_disasm()
683 op[0] = idx == 0x08 ? REG (rs2) : FREG (rs2); in riscv_disasm()
703 rs2 = (word >> 20) & 0x1f; in riscv_disasm()
[all …]
/third_party/gstreamer/gstplugins_good/gst/goom/
Dxmmx.h385 #define mmx_r2ir(op, rs1, rs2) \ argument
386 __asm__ __volatile__ (#op " %%" #rs1 ", %%" #rs2 \
442 #define paddsiw_r2ir(rs1, rs2) mmx_r2ir(paddsiw, rs1, rs2) argument
450 #define psubsiw_r2ir(rs1, rs2) mmx_r2ir(psubsiw, rs1, rs2) argument
466 #define pmulhriw_r2ir(rs1, rs2) mmx_r2ir(pmulhriw, rs1, rs2) argument
474 #define pmachriw_r2ir(rs1, rs2) mmx_r2ir(pmachriw, rs1, rs2) argument
/third_party/openssl/crypto/aes/asm/
Daesfx-sparcv9.pl1119 .Lout_align: ! fshiftorx parameters for right shift toward %rs2
1140 my ($mnemonic,$rs1,$rs2,$rd)=@_;
1148 $ref = "$mnemonic\t$rs1,$rs2,$rd";
1151 foreach ($rs1,$rs2,$rd) {
1162 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
1170 my ($mnemonic,$rs1,$rs2,$rd)=@_;
1177 $ref = "$mnemonic\t$rs1,$rs2,$rd";
1180 foreach ($rs1,$rs2,$rd) {
1186 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
1194 my ($mnemonic,$rs1,$rs2,$rd)=@_;
[all …]
/third_party/openssl/crypto/perlasm/
Dsparcv9_modes.pl1405 my ($mnemonic,$rs1,$rs2,$rd)=@_;
1413 $ref = "$mnemonic\t$rs1,$rs2,$rd";
1416 foreach ($rs1,$rs2,$rd) {
1427 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
1435 my ($mnemonic,$rs1,$rs2,$rd)=@_;
1445 $ref = "$mnemonic\t$rs1,$rs2,$rd";
1448 foreach ($rs1,$rs2,$rd) {
1454 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
1462 my ($mnemonic,$rs1,$rs2,$rs3,$rd)=@_;
1474 $ref = "$mnemonic\t$rs1,$rs2,$rs3,$rd";
[all …]
/third_party/openssl/crypto/sha/asm/
Dsha1-sparcv9.pl384 my ($mnemonic,$rs1,$rs2,$rd)=@_;
389 $ref = "$mnemonic\t$rs1,$rs2,$rd";
392 foreach ($rs1,$rs2,$rd) {
403 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
410 my ($mnemonic,$rs1,$rs2,$rd)=@_;
412 my $ref="$mnemonic\t$rs1,$rs2,$rd";
414 foreach ($rs1,$rs2,$rd) {
419 0x81b00300|$rd<<25|$rs1<<14|$rs2,
Dsha1-sparcv9a.pl557 my ($mnemonic,$rs1,$rs2,$rd)=@_;
565 $ref = "$mnemonic\t$rs1,$rs2,$rd";
568 foreach ($rs1,$rs2,$rd) {
579 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
586 my ($mnemonic,$rs1,$rs2,$rd)=@_;
588 my $ref="$mnemonic\t$rs1,$rs2,$rd";
590 foreach ($rs1,$rs2,$rd) {
595 0x81b00300|$rd<<25|$rs1<<14|$rs2,
Dsha512-sparcv9.pl810 my ($mnemonic,$rs1,$rs2,$rd)=@_;
815 $ref = "$mnemonic\t$rs1,$rs2,$rd";
818 foreach ($rs1,$rs2,$rd) {
829 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
836 my ($mnemonic,$rs1,$rs2,$rd)=@_;
838 my $ref="$mnemonic\t$rs1,$rs2,$rd";
840 foreach ($rs1,$rs2,$rd) {
845 0x81b00300|$rd<<25|$rs1<<14|$rs2,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp378 unsigned rs2 = 0; in DecodeMem() local
383 rs2 = fieldFromInstruction(insn, 0, 5); in DecodeMem()
401 status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); in DecodeMem()
533 unsigned rs2 = 0; in DecodeJMPL() local
538 rs2 = fieldFromInstruction(insn, 0, 5); in DecodeJMPL()
554 status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); in DecodeJMPL()
566 unsigned rs2 = 0; in DecodeReturn() local
571 rs2 = fieldFromInstruction(insn, 0, 5); in DecodeReturn()
582 status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); in DecodeReturn()
597 unsigned rs2 = 0; in DecodeSWAP() local
[all …]
/third_party/openssl/crypto/md5/asm/
Dmd5-sparcv9.pl390 my ($mnemonic,$rs1,$rs2,$rd)=@_;
395 $ref = "$mnemonic\t$rs1,$rs2,$rd";
398 foreach ($rs1,$rs2,$rd) {
409 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
416 my ($mnemonic,$rs1,$rs2,$rd)=@_;
418 my $ref="$mnemonic\t$rs1,$rs2,$rd";
420 foreach ($rs1,$rs2,$rd) {
425 0x81b00300|$rd<<25|$rs1<<14|$rs2,
/third_party/mbedtls/library/
Dpoly1305.c102 uint32_t rs1, rs2, rs3; in poly1305_process() local
112 rs2 = r2 + ( r2 >> 2U ); in poly1305_process()
144 mul64( acc2, rs2 ) + in poly1305_process()
149 mul64( acc3, rs2 ) + in poly1305_process()
155 mul64( acc4, rs2 ); in poly1305_process()
/third_party/openssl/crypto/bn/asm/
Dvis3-mont.pl353 my ($mnemonic,$rs1,$rs2,$rd)=@_;
360 $ref = "$mnemonic\t$rs1,$rs2,$rd";
363 foreach ($rs1,$rs2,$rd) {
369 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
/third_party/openssl/crypto/poly1305/asm/
Dpoly1305-sparcv9.pl1057 my ($mnemonic,$rs1,$rs2,$rd)=@_;
1064 $ref = "$mnemonic\t$rs1,$rs2,$rd";
1067 foreach ($rs1,$rs2,$rd) {
1073 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
1081 my ($mnemonic,$rs1,$rs2,$rs3,$rd)=@_;
1088 $ref = "$mnemonic\t$rs1,$rs2,$rs3,$rd";
1091 foreach ($rs1,$rs2,$rs3,$rd) {
1102 0x81b80000|$rd<<25|$rs1<<14|$rs3<<9|$opf<<5|$rs2,

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